blob: a2239b990b8aff8d329423d7149fde7b9b5aa5ff [file] [log] [blame]
Jagan Teki1d150b42018-12-22 21:32:49 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
Samuel Holland12e3faa2021-09-12 11:48:43 -05007#ifndef _CLK_SUNXI_H
8#define _CLK_SUNXI_H
Jagan Teki1d150b42018-12-22 21:32:49 +05309
Simon Glass4dcacfc2020-05-10 11:40:13 -060010#include <linux/bitops.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060011
Jagan Teki1d150b42018-12-22 21:32:49 +053012/**
Jagan Teki7f6c2a82019-01-18 22:18:13 +053013 * enum ccu_flags - ccu clock/reset flags
Jagan Teki1d150b42018-12-22 21:32:49 +053014 *
15 * @CCU_CLK_F_IS_VALID: is given clock gate is valid?
Jagan Teki7f6c2a82019-01-18 22:18:13 +053016 * @CCU_RST_F_IS_VALID: is given reset control is valid?
Jagan Teki1d150b42018-12-22 21:32:49 +053017 */
18enum ccu_flags {
19 CCU_CLK_F_IS_VALID = BIT(0),
Jagan Teki7f6c2a82019-01-18 22:18:13 +053020 CCU_RST_F_IS_VALID = BIT(1),
Jagan Teki1d150b42018-12-22 21:32:49 +053021};
22
23/**
24 * struct ccu_clk_gate - ccu clock gate
25 * @off: gate offset
26 * @bit: gate bit
27 * @flags: ccu clock gate flags
28 */
29struct ccu_clk_gate {
30 u16 off;
31 u32 bit;
32 enum ccu_flags flags;
33};
34
35#define GATE(_off, _bit) { \
36 .off = _off, \
37 .bit = _bit, \
38 .flags = CCU_CLK_F_IS_VALID, \
39}
40
41/**
Jagan Teki7f6c2a82019-01-18 22:18:13 +053042 * struct ccu_reset - ccu reset
43 * @off: reset offset
44 * @bit: reset bit
45 * @flags: ccu reset control flags
46 */
47struct ccu_reset {
48 u16 off;
49 u32 bit;
50 enum ccu_flags flags;
51};
52
53#define RESET(_off, _bit) { \
54 .off = _off, \
55 .bit = _bit, \
56 .flags = CCU_RST_F_IS_VALID, \
57}
58
59/**
Jagan Teki1d150b42018-12-22 21:32:49 +053060 * struct ccu_desc - clock control unit descriptor
61 *
62 * @gates: clock gates
Jagan Teki7f6c2a82019-01-18 22:18:13 +053063 * @resets: reset unit
Jagan Teki1d150b42018-12-22 21:32:49 +053064 */
65struct ccu_desc {
66 const struct ccu_clk_gate *gates;
Jagan Teki7f6c2a82019-01-18 22:18:13 +053067 const struct ccu_reset *resets;
Jagan Teki1d150b42018-12-22 21:32:49 +053068};
69
70/**
71 * struct ccu_priv - sunxi clock control unit
72 *
73 * @base: base address
74 * @desc: ccu descriptor
75 */
76struct ccu_priv {
77 void *base;
78 const struct ccu_desc *desc;
79};
80
81/**
82 * sunxi_clk_probe - common sunxi clock probe
83 * @dev: clock device
84 */
85int sunxi_clk_probe(struct udevice *dev);
86
87extern struct clk_ops sunxi_clk_ops;
88
Jagan Teki7f6c2a82019-01-18 22:18:13 +053089/**
90 * sunxi_reset_bind() - reset binding
91 *
92 * @dev: reset device
93 * @count: reset count
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010094 * Return: 0 success, or error value
Jagan Teki7f6c2a82019-01-18 22:18:13 +053095 */
96int sunxi_reset_bind(struct udevice *dev, ulong count);
97
Samuel Holland12e3faa2021-09-12 11:48:43 -050098#endif /* _CLK_SUNXI_H */