| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2021 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_RK3568_COMMON_H |
| 7 | #define __CONFIG_RK3568_COMMON_H |
| 8 | |
| Jonas Karlman | be56bb5 | 2023-02-22 22:44:41 +0000 | [diff] [blame] | 9 | #define CFG_CPUID_OFFSET 0xa |
| 10 | |
| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 11 | #include "rockchip-common.h" |
| 12 | |
| Tom Rini | 3088b31 | 2022-12-04 10:04:13 -0500 | [diff] [blame] | 13 | #define CFG_IRAM_BASE 0xfdcc0000 |
| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 14 | |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 15 | #define CFG_SYS_SDRAM_BASE 0 |
| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 16 | #define SDRAM_MAX_SIZE 0xf0000000 |
| 17 | |
| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 18 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 19 | "scriptaddr=0x00c00000\0" \ |
| 20 | "pxefile_addr_r=0x00e00000\0" \ |
| 21 | "fdt_addr_r=0x0a100000\0" \ |
| 22 | "kernel_addr_r=0x02080000\0" \ |
| 23 | "ramdisk_addr_r=0x0a200000\0" |
| 24 | |
| 25 | #include <config_distro_bootcmd.h> |
| Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 26 | #define CFG_EXTRA_ENV_SETTINGS \ |
| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 27 | ENV_MEM_LAYOUT_SETTINGS \ |
| 28 | "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
| 29 | "partitions=" PARTS_DEFAULT \ |
| 30 | ROCKCHIP_DEVICE_SETTINGS \ |
| 31 | BOOTENV |
| Joseph Chen | 72cd879 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 32 | |
| 33 | #endif |