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git01.mediatek.com / filogic / uboot / 4767923aab7157bc735732614f3e29eb2beb5c3a / . / board / samsung / smdk5420 / smdk5420.c
blob: 183c52248a331ba23352a47b96a9f8fe21bbbb33 [file] [log] [blame]
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]1/*
2 * Copyright (C) 2013 Samsung Electronics
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <fdtdec.h>
9#include <asm/io.h>
10#include <i2c.h>
11#include <lcd.h>
12#include <spi.h>
13#include <asm/arch/board.h>
14#include <asm/arch/cpu.h>
15#include <asm/arch/gpio.h>
16#include <asm/arch/pinmux.h>
17#include <asm/arch/dp_info.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21#ifdef CONFIG_USB_EHCI_EXYNOS
22static int board_usb_vbus_init(void)
23{
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]24 /* Enable VBUS power switch */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530[diff] [blame]25 gpio_direction_output(EXYNOS5420_GPIO_X26, 1);
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]26
27 /* VBUS turn ON time */
28 mdelay(3);
29
30 return 0;
31}
32#endif
33
34int exynos_init(void)
35{
36#ifdef CONFIG_USB_EHCI_EXYNOS
37 board_usb_vbus_init();
38#endif
39 return 0;
40}
41
42#ifdef CONFIG_LCD
43void cfg_lcd_gpio(void)
44{
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]45 /* For Backlight */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530[diff] [blame]46 gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_OUTPUT);
47 gpio_set_value(EXYNOS5420_GPIO_B20, 1);
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]48
49 /* LCD power on */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530[diff] [blame]50 gpio_cfg_pin(EXYNOS5420_GPIO_X15, S5P_GPIO_OUTPUT);
51 gpio_set_value(EXYNOS5420_GPIO_X15, 1);
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]52
53 /* Set Hotplug detect for DP */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530[diff] [blame]54 gpio_cfg_pin(EXYNOS5420_GPIO_X07, S5P_GPIO_FUNC(0x3));
Rajeshwari Birje5b475ae2013-12-26 09:44:24 +0530[diff] [blame]55}
56
57vidinfo_t panel_info = {
58 .vl_freq = 60,
59 .vl_col = 2560,
60 .vl_row = 1600,
61 .vl_width = 2560,
62 .vl_height = 1600,
63 .vl_clkp = CONFIG_SYS_LOW,
64 .vl_hsp = CONFIG_SYS_LOW,
65 .vl_vsp = CONFIG_SYS_LOW,
66 .vl_dp = CONFIG_SYS_LOW,
67 .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */
68
69 /* wDP panel timing infomation */
70 .vl_hspw = 32,
71 .vl_hbpd = 80,
72 .vl_hfpd = 48,
73
74 .vl_vspw = 6,
75 .vl_vbpd = 37,
76 .vl_vfpd = 3,
77 .vl_cmd_allow_len = 0xf,
78
79 .win_id = 3,
80 .cfg_gpio = cfg_lcd_gpio,
81 .backlight_on = NULL,
82 .lcd_power_on = NULL,
83 .reset_lcd = NULL,
84 .dual_lcd_enabled = 0,
85
86 .init_delay = 0,
87 .power_on_delay = 0,
88 .reset_delay = 0,
89 .interface_mode = FIMD_RGB_INTERFACE,
90 .dp_enabled = 1,
91};
92
93static struct edp_device_info edp_info = {
94 .disp_info = {
95 .h_res = 2560,
96 .h_sync_width = 32,
97 .h_back_porch = 80,
98 .h_front_porch = 48,
99 .v_res = 1600,
100 .v_sync_width = 6,
101 .v_back_porch = 37,
102 .v_front_porch = 3,
103 .v_sync_rate = 60,
104 },
105 .lt_info = {
106 .lt_status = DP_LT_NONE,
107 },
108 .video_info = {
109 .master_mode = 0,
110 .bist_mode = DP_DISABLE,
111 .bist_pattern = NO_PATTERN,
112 .h_sync_polarity = 0,
113 .v_sync_polarity = 0,
114 .interlaced = 0,
115 .color_space = COLOR_RGB,
116 .dynamic_range = VESA,
117 .ycbcr_coeff = COLOR_YCBCR601,
118 .color_depth = COLOR_8,
119 },
120};
121
122static struct exynos_dp_platform_data dp_platform_data = {
123 .phy_enable = set_dp_phy_ctrl,
124 .edp_dev_info = &edp_info,
125};
126
127void init_panel_info(vidinfo_t *vid)
128{
129 vid->rgb_mode = MODE_RGB_P;
130
131 exynos_set_dp_platform_data(&dp_platform_data);
132}
133#endif
134
135int board_get_revision(void)
136{
137 return 0;
138}