blob: 5ade69561654707760d28a99ab7304767cab414e [file] [log] [blame]
huang lina77e50c2015-12-07 11:08:57 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <asm/io.h>
10#include <asm/arch/uart.h>
Jeffy Chena32d0092016-01-14 10:19:40 +080011#include <asm/arch-rockchip/grf_rk3036.h>
huang lina77e50c2015-12-07 11:08:57 +080012#include <asm/arch/sdram_rk3036.h>
Jeffy Chena32d0092016-01-14 10:19:40 +080013#include <asm/gpio.h>
huang lina77e50c2015-12-07 11:08:57 +080014
15DECLARE_GLOBAL_DATA_PTR;
16
Jeffy Chena32d0092016-01-14 10:19:40 +080017#define GRF_BASE 0x20008000
18
huang lina77e50c2015-12-07 11:08:57 +080019void get_ddr_config(struct rk3036_ddr_config *config)
20{
21 /* K4B4G1646Q config */
22 config->ddr_type = 3;
23 config->rank = 1;
24 config->cs0_row = 15;
25 config->cs1_row = 15;
26
27 /* 8bank */
28 config->bank = 3;
29 config->col = 10;
30
31 /* 16bit bw */
32 config->bw = 1;
33}
34
Jeffy Chena32d0092016-01-14 10:19:40 +080035#define FASTBOOT_KEY_GPIO 93
36
37int fastboot_key_pressed(void)
38{
39 gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
40 gpio_direction_input(FASTBOOT_KEY_GPIO);
41 return !gpio_get_value(FASTBOOT_KEY_GPIO);
42}
43
44#define ROCKCHIP_BOOT_MODE_FASTBOOT 0x5242C309
45
46int board_late_init(void)
47{
48 struct rk3036_grf * const grf = (void *)GRF_BASE;
49 int boot_mode = readl(&grf->os_reg[4]);
50
51 /* Clear boot mode */
52 writel(0, &grf->os_reg[4]);
53
54 if (boot_mode == ROCKCHIP_BOOT_MODE_FASTBOOT ||
55 fastboot_key_pressed()) {
56 printf("enter fastboot!\n");
57 setenv("preboot", "setenv preboot; fastboot usb0");
58 }
59
60 return 0;
61}
62
huang lina77e50c2015-12-07 11:08:57 +080063int board_init(void)
64{
65 return 0;
66}
67
68int dram_init(void)
69{
70 gd->ram_size = sdram_size();
71
72 return 0;
73}
74
75#ifndef CONFIG_SYS_DCACHE_OFF
76void enable_caches(void)
77{
78 /* Enable D-cache. I-cache is already enabled in start.S */
79 dcache_enable();
80}
81#endif
Xu Ziyuane71ce522016-07-28 11:42:34 +080082
83#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
84#include <usb.h>
85#include <usb/dwc2_udc.h>
86
87static struct dwc2_plat_otg_data rk3036_otg_data = {
88 .rx_fifo_sz = 512,
89 .np_tx_fifo_sz = 16,
90 .tx_fifo_sz = 128,
91};
92
93int board_usb_init(int index, enum usb_init_type init)
94{
95 int node;
96 const char *mode;
97 bool matched = false;
98 const void *blob = gd->fdt_blob;
99
100 /* find the usb_otg node */
101 node = fdt_node_offset_by_compatible(blob, -1,
102 "rockchip,rk3288-usb");
103
104 while (node > 0) {
105 mode = fdt_getprop(blob, node, "dr_mode", NULL);
106 if (mode && strcmp(mode, "otg") == 0) {
107 matched = true;
108 break;
109 }
110
111 node = fdt_node_offset_by_compatible(blob, node,
112 "rockchip,rk3288-usb");
113 }
114 if (!matched) {
115 debug("Not found usb_otg device\n");
116 return -ENODEV;
117 }
118 rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
119
120 return dwc2_udc_probe(&rk3036_otg_data);
121}
122
123int board_usb_cleanup(int index, enum usb_init_type init)
124{
125 return 0;
126}
127#endif