| Sylvain Lemieux | c56b2d6 | 2015-07-27 13:37:36 -0400 | [diff] [blame] | 1 | /* |
| 2 | * LPC32xx GPIO interface macro for pin mapping. |
| 3 | * |
| 4 | * (C) Copyright 2015 DENX Software Engineering GmbH |
| 5 | * Written-by: Sylvain Lemieux <slemieux@@tycoint.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef _LPC32XX_GPIO_GRP_H |
| 11 | #define _LPC32XX_GPIO_GRP_H |
| 12 | |
| 13 | /* |
| 14 | * Macro to map the pin for the lpc32xx_gpio driver. |
| Sylvain Lemieux | 06dc5c0 | 2015-09-09 11:35:58 -0400 | [diff] [blame] | 15 | * Note: - GPIOS are considered here as homogeneous and linear from 0 to 159; |
| Sylvain Lemieux | c56b2d6 | 2015-07-27 13:37:36 -0400 | [diff] [blame] | 16 | * mapping is done per register, as group of 32. |
| 17 | * (see drivers/gpio/lpc32xx_gpio.c for details). |
| 18 | * - macros can be use with the following pins: |
| 19 | * P0.0 - P0.7 |
| 20 | * P1.0 - P1.23 |
| 21 | * P2.0 - P2.12 |
| 22 | * P3 GPI_0 - GPI_9 / GPI_15 - GPI_23 / GPI_25 / GPI_27 - GPI_28 |
| 23 | * P3 GPO_0 - GPO_23 |
| 24 | * P3 GPIO_0 - GPIO_5 (output register only) |
| 25 | */ |
| 26 | #define LPC32XX_GPIO_P0_GRP 0 |
| 27 | #define LPC32XX_GPIO_P1_GRP 32 |
| 28 | #define LPC32XX_GPIO_P2_GRP 64 |
| Sylvain Lemieux | c56b2d6 | 2015-07-27 13:37:36 -0400 | [diff] [blame] | 29 | #define LPC32XX_GPO_P3_GRP 96 |
| 30 | #define LPC32XX_GPIO_P3_GRP (LPC32XX_GPO_P3_GRP + 25) |
| Sylvain Lemieux | 06dc5c0 | 2015-09-09 11:35:58 -0400 | [diff] [blame] | 31 | #define LPC32XX_GPI_P3_GRP 128 |
| Sylvain Lemieux | c56b2d6 | 2015-07-27 13:37:36 -0400 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * A specific GPIO can be selected with this macro |
| 35 | * ie, GPIO P0.1 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P0_GRP, 1) |
| 36 | * See the LPC32x0 User's guide for GPIO group numbers |
| 37 | */ |
| 38 | #define LPC32XX_GPIO(x, y) ((x) + (y)) |
| 39 | |
| 40 | #endif /* _LPC32XX_GPIO_GRP_H */ |