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git01.mediatek.com / filogic / uboot / 469174fe63cbc3794a7c41220ea996e374d11e79 / . / include / configs / hsdk.h
blob: 9af1d12701cad6184213577d23b5069132696fdb [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]2/*
3 * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]4 */
5
6#ifndef _CONFIG_HSDK_H_
7#define _CONFIG_HSDK_H_
8
9#include <linux/sizes.h>
10
11/*
12 * CPU configuration
13 */
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]14#define NR_CPUS 4
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]15#define ARC_PERIPHERAL_BASE 0xF0000000
16#define ARC_DWMMC_BASE (ARC_PERIPHERAL_BASE + 0xA000)
17#define ARC_DWGMAC_BASE (ARC_PERIPHERAL_BASE + 0x18000)
18
19/*
20 * Memory configuration
21 */
22#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
23
24#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
25#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26#define CONFIG_SYS_SDRAM_SIZE SZ_1G
27
28#define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
30
31#define CONFIG_SYS_MALLOC_LEN SZ_2M
Alexey Brodkin75429682018-01-19 16:13:51 +0300[diff] [blame]32#define CONFIG_SYS_BOOTM_LEN SZ_128M
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]33#define CONFIG_SYS_LOAD_ADDR 0x82000000
34
35/*
36 * This board might be of different versions so handle it
37 */
38#define CONFIG_BOARD_TYPES
39
40/*
41 * UART configuration
42 */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]43#define CONFIG_SYS_NS16550_SERIAL
44#define CONFIG_SYS_NS16550_CLK 33330000
45#define CONFIG_SYS_NS16550_MEM32
46
47/*
48 * Ethernet PHY configuration
49 */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]50
51/*
52 * USB 1.1 configuration
53 */
54#define CONFIG_USB_OHCI_NEW
55#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
56
57/*
58 * Environment settings
59 */
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]60#define CONFIG_EXTRA_ENV_SETTINGS \
Eugeniy Paltsev55457592018-06-04 14:52:32 +0300[diff] [blame]61 "upgrade=if mmc rescan && " \
62 "fatload mmc 0:1 ${loadaddr} u-boot-update.scr && " \
63 "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \
64 "\"Fail to upgrade.\n" \
65 "Do you have u-boot-update.scr and u-boot.head on first (FAT) SD card partition?\"" \
66 "; fi\0" \
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]67 "core_dccm_0=0x10\0" \
68 "core_dccm_1=0x6\0" \
69 "core_dccm_2=0x10\0" \
70 "core_dccm_3=0x6\0" \
71 "core_iccm_0=0x10\0" \
72 "core_iccm_1=0x6\0" \
73 "core_iccm_2=0x10\0" \
74 "core_iccm_3=0x6\0" \
75 "core_mask=0xF\0" \
76 "dcache_ena=0x1\0" \
77 "icache_ena=0x1\0" \
78 "non_volatile_limit=0xE\0" \
79 "hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; \
80setenv dcache_ena 0x0; setenv core_iccm_1 0x7; \
81setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0;\0" \
82 "hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; \
83setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
84setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;\0" \
85 "hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; \
86setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \
87setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;\0" \
88 "hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; \
89setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
90setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;\0" \
91 "hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; \
92setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \
93setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;\0" \
94 "hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; \
95setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
96setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
97setenv core_iccm_1 0x6; setenv core_dccm_1 0x6;\0" \
98 "hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; \
99setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
100setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
101setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \
102setenv core_iccm_2 0x10; setenv core_dccm_2 0x10;\0" \
103 "hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; \
104setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
105setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
106setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \
107setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \
108setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0"
109
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]110/*
111 * Environment configuration
112 */
113#define CONFIG_BOOTFILE "uImage"
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]114#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
115
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]116/* Cli configuration */
117#define CONFIG_SYS_CBSIZE SZ_2K
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]118
119/*
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]120 * Callback configuration
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]121 */
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]122#define CONFIG_BOARD_LATE_INIT
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]123
124#endif /* _CONFIG_HSDK_H_ */