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git01.mediatek.com / filogic / uboot / 468c2d50da115b05a134071c07402176cf5e887f / . / configs / MPC8548CDS_defconfig
blob: 7dcc338f4cfbae71131fc6fbd79bcd35e9b34262 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xFFF80000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x2000
4CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]6CONFIG_MPC85xx=y
Simon Glass9fdc0de2017-05-17 03:25:15 -0600[diff] [blame]7# CONFIG_CMD_ERRATA is not set
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]8CONFIG_TARGET_MPC8548CDS=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]9CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]10CONFIG_OF_BOARD_SETUP=y
11CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]12CONFIG_BOOTDELAY=10
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]13# CONFIG_MISC_INIT_R is not set
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]14CONFIG_ID_EEPROM=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]15CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]16CONFIG_CMD_IMLS=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]17CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]18CONFIG_CMD_I2C=y
Simon Glassc88a09a2017-08-04 16:34:34 -0600[diff] [blame]19CONFIG_CMD_PCI=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]20CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]22CONFIG_CMD_PING=y
Simon Glass027608e2017-05-17 03:25:25 -0600[diff] [blame]23# CONFIG_CMD_HASH is not set
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]24CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]25CONFIG_ENV_OVERWRITE=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]26CONFIG_ENV_ADDR=0xFFF60000
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]27CONFIG_DM=y
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame^]28CONFIG_DDR_ECC=y
29CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]30CONFIG_DM_I2C=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]31CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]32CONFIG_SYS_I2C_FSL=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]33CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]34# CONFIG_MMC is not set
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]35CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]36CONFIG_FLASH_CFI_DRIVER=y
37CONFIG_SYS_FLASH_CFI=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]38CONFIG_PHY_ATHEROS=y
39CONFIG_PHY_BROADCOM=y
40CONFIG_PHY_DAVICOM=y
41CONFIG_PHY_LXT=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]42CONFIG_PHY_MARVELL=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]43CONFIG_PHY_NATSEMI=y
44CONFIG_PHY_REALTEK=y
45CONFIG_PHY_SMSC=y
46CONFIG_PHY_VITESSE=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]47CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]48CONFIG_E1000=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]49CONFIG_MII=y
50CONFIG_TSEC_ENET=y
Hou Zhiqiang3f7f8e62019-08-27 11:05:29 +0000[diff] [blame]51CONFIG_DM_PCI_COMPAT=y
52CONFIG_PCIE_FSL=y
Tom Rinie69ba982018-03-06 19:02:27 -0500[diff] [blame]53CONFIG_CONS_INDEX=2
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]54CONFIG_SYS_NS16550=y