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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese93e6bf42014-10-22 12:13:17 +02002/*
3 * (C) Copyright 2011
4 * Marvell Semiconductor <www.marvell.com>
5 * Written-by: Lei Wen <leiwen@marvell.com>
Stefan Roese93e6bf42014-10-22 12:13:17 +02006 */
7
8/*
9 * This file should be included in board config header file.
10 *
Stefan Roese7cd34842015-04-25 06:29:49 +020011 * It supports common definitions for MVEBU platforms
Stefan Roese93e6bf42014-10-22 12:13:17 +020012 */
13
Stefan Roeseebda3ec2015-04-25 06:29:47 +020014#ifndef _MVEBU_CONFIG_H
15#define _MVEBU_CONFIG_H
Stefan Roese93e6bf42014-10-22 12:13:17 +020016
17#include <asm/arch/soc.h>
18
Stefan Roese479f9af2016-02-10 07:23:00 +010019#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
Chris Packhama8f845e2019-04-11 22:22:50 +120020 || defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_MSYS)
Stefan Roeseeb083e52015-12-21 13:56:33 +010021/*
22 * Set this for the common xor register definitions needed in dram.c
23 * for A38x as well here.
24 */
Stefan Roese93e6bf42014-10-22 12:13:17 +020025#define MV88F78X60 /* for the DDR training bin_hdr code */
Stefan Roese7cd34842015-04-25 06:29:49 +020026#endif
Stefan Roese93e6bf42014-10-22 12:13:17 +020027
Stefan Roese93e6bf42014-10-22 12:13:17 +020028#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
29
Stefan Roeseebda3ec2015-04-25 06:29:47 +020030#endif /* __MVEBU_CONFIG_H */