Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2013 Freescale Semiconductor, Inc. |
| 3 | * |
York Sun | b27fef5 | 2013-08-20 10:15:37 -0700 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 8 | #include <console.h> |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 9 | #include <ns16550.h> |
| 10 | #include <malloc.h> |
| 11 | #include <mmc.h> |
| 12 | #include <nand.h> |
| 13 | #include <i2c.h> |
| 14 | #include "../common/ngpixis.h" |
| 15 | #include <fsl_esdhc.h> |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 16 | #include <spi_flash.h> |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | static const u32 sysclk_tbl[] = { |
| 21 | 66666000, 7499900, 83332500, 8999900, |
| 22 | 99999000, 11111000, 12499800, 13333200 |
| 23 | }; |
| 24 | |
York Sun | 863e8d8 | 2014-02-11 11:57:26 -0800 | [diff] [blame] | 25 | phys_size_t get_effective_memsize(void) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 26 | { |
| 27 | return CONFIG_SYS_L2_SIZE; |
| 28 | } |
| 29 | |
| 30 | void board_init_f(ulong bootflag) |
| 31 | { |
| 32 | int px_spd; |
| 33 | u32 plat_ratio, sys_clk, bus_clk; |
| 34 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 35 | |
| 36 | console_init_f(); |
| 37 | |
| 38 | /* Set pmuxcr to allow both i2c1 and i2c2 */ |
| 39 | setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); |
| 40 | setbits_be32(&gur->pmuxcr, |
| 41 | in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); |
| 42 | |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 43 | #ifdef CONFIG_SPL_SPI_BOOT |
| 44 | /* Enable the SPI */ |
| 45 | clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); |
| 46 | #endif |
| 47 | |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 48 | /* Read back the register to synchronize the write. */ |
| 49 | in_be32(&gur->pmuxcr); |
| 50 | |
| 51 | /* initialize selected port with appropriate baud rate */ |
| 52 | px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); |
| 53 | sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; |
| 54 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
| 55 | bus_clk = sys_clk * plat_ratio / 2; |
| 56 | |
| 57 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
| 58 | bus_clk / 16 / CONFIG_BAUDRATE); |
| 59 | #ifdef CONFIG_SPL_MMC_BOOT |
| 60 | puts("\nSD boot...\n"); |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 61 | #elif defined(CONFIG_SPL_SPI_BOOT) |
| 62 | puts("\nSPI Flash boot...\n"); |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 63 | #endif |
| 64 | |
| 65 | /* copy code to RAM and jump to it - this should not return */ |
| 66 | /* NOTE - code has to be copied out of NAND buffer before |
| 67 | * other blocks can be read. |
| 68 | */ |
| 69 | relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); |
| 70 | } |
| 71 | |
| 72 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 73 | { |
| 74 | /* Pointer is writable since we allocated a register for it */ |
| 75 | gd = (gd_t *)CONFIG_SPL_GD_ADDR; |
| 76 | bd_t *bd; |
| 77 | |
| 78 | memset(gd, 0, sizeof(gd_t)); |
| 79 | bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); |
| 80 | memset(bd, 0, sizeof(bd_t)); |
| 81 | gd->bd = bd; |
| 82 | bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; |
| 83 | bd->bi_memsize = CONFIG_SYS_L2_SIZE; |
| 84 | |
| 85 | probecpu(); |
| 86 | get_clocks(); |
| 87 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, |
| 88 | CONFIG_SPL_RELOC_MALLOC_SIZE); |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 89 | #ifndef CONFIG_SPL_NAND_BOOT |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 90 | env_init(); |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 91 | #endif |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 92 | #ifdef CONFIG_SPL_MMC_BOOT |
| 93 | mmc_initialize(bd); |
| 94 | #endif |
| 95 | /* relocate environment function pointers etc. */ |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 96 | #ifdef CONFIG_SPL_NAND_BOOT |
| 97 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
| 98 | (uchar *)CONFIG_ENV_ADDR); |
| 99 | |
| 100 | gd->env_addr = (ulong)(CONFIG_ENV_ADDR); |
| 101 | gd->env_valid = 1; |
| 102 | #else |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 103 | env_relocate(); |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 104 | #endif |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 105 | |
Ying Zhang | 4393f95 | 2013-09-04 17:03:45 +0800 | [diff] [blame] | 106 | #ifdef CONFIG_SYS_I2C |
| 107 | i2c_init_all(); |
| 108 | #else |
| 109 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
| 110 | #endif |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 111 | |
| 112 | gd->ram_size = initdram(0); |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 113 | #ifdef CONFIG_SPL_NAND_BOOT |
| 114 | puts("Tertiary program loader running in sram..."); |
| 115 | #else |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 116 | puts("Second program loader running in sram...\n"); |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 117 | #endif |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 118 | |
| 119 | #ifdef CONFIG_SPL_MMC_BOOT |
| 120 | mmc_boot(); |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 121 | #elif defined(CONFIG_SPL_SPI_BOOT) |
| 122 | spi_boot(); |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 123 | #elif defined(CONFIG_SPL_NAND_BOOT) |
| 124 | nand_boot(); |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 125 | #endif |
| 126 | } |