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Michael Trimarchie30a3362008-11-28 13:22:09 +01001/*
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +05302 * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
Vivek Mahajan288f7fb2009-05-25 17:23:16 +05303 *
Michael Trimarchie30a3362008-11-28 13:22:09 +01004 * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
5 *
6 * Author: Tor Krill tor@excito.com
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Michael Trimarchie30a3362008-11-28 13:22:09 +01009 */
10
11#include <common.h>
12#include <pci.h>
13#include <usb.h>
Michael Trimarchie30a3362008-11-28 13:22:09 +010014#include <asm/io.h>
Vivek Mahajan288f7fb2009-05-25 17:23:16 +053015#include <usb/ehci-fsl.h>
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053016#include <hwconfig.h>
Nikhil Badola76c2f2e2014-09-30 11:22:43 +053017#include <fsl_usb.h>
Nikhil Badolab6fd44c2014-10-20 16:50:49 +053018#include <fdt_support.h>
Michael Trimarchie30a3362008-11-28 13:22:09 +010019
Jean-Christophe PLAGNIOL-VILLARD8f6bcf42009-04-03 12:46:58 +020020#include "ehci.h"
Michael Trimarchie30a3362008-11-28 13:22:09 +010021
Nikhil Badolab6fd44c2014-10-20 16:50:49 +053022#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
23#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
24#endif
25
Nikhil Badolab0b48da2014-04-07 08:46:14 +053026static void set_txfifothresh(struct usb_ehci *, u32);
27
Shengzhou Liud407e1f2012-10-22 13:18:24 +080028/* Check USB PHY clock valid */
29static int usb_phy_clk_valid(struct usb_ehci *ehci)
30{
31 if (!((in_be32(&ehci->control) & PHY_CLK_VALID) ||
32 in_be32(&ehci->prictrl))) {
33 printf("USB PHY clock invalid!\n");
34 return 0;
35 } else {
36 return 1;
37 }
38}
39
Michael Trimarchie30a3362008-11-28 13:22:09 +010040/*
41 * Create the appropriate control structures to manage
42 * a new EHCI host controller.
43 *
44 * Excerpts from linux ehci fsl driver.
45 */
Troy Kisky7d6bbb92013-10-10 15:27:57 -070046int ehci_hcd_init(int index, enum usb_init_type init,
47 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Michael Trimarchie30a3362008-11-28 13:22:09 +010048{
ramneek mehresh16b08062013-09-12 16:35:49 +053049 struct usb_ehci *ehci = NULL;
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053050 const char *phy_type = NULL;
51 size_t len;
Nikhil Badolaeb97e252013-12-19 11:08:46 +053052 char current_usb_controller[5];
Kumar Gala7b83c352011-11-09 10:04:15 -060053#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
54 char usb_phy[5];
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053055
56 usb_phy[0] = '\0';
Kumar Gala7b83c352011-11-09 10:04:15 -060057#endif
Nikhil Badola2613cfc2014-02-26 17:43:15 +053058 if (has_erratum_a007075()) {
59 /*
60 * A 5ms delay is needed after applying soft-reset to the
61 * controller to let external ULPI phy come out of reset.
62 * This delay needs to be added before re-initializing
63 * the controller after soft-resetting completes
64 */
65 mdelay(5);
66 }
Nikhil Badolaeb97e252013-12-19 11:08:46 +053067 memset(current_usb_controller, '\0', 5);
68 snprintf(current_usb_controller, 4, "usb%d", index+1);
Michael Trimarchie30a3362008-11-28 13:22:09 +010069
ramneek mehresh16b08062013-09-12 16:35:49 +053070 switch (index) {
71 case 0:
72 ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
73 break;
74 case 1:
75 ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR;
76 break;
77 default:
78 printf("ERROR: wrong controller index!!\n");
79 break;
80 };
81
Lucas Stach3494a4c2012-09-26 00:14:35 +020082 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
83 *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
84 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
Michael Trimarchie30a3362008-11-28 13:22:09 +010085
Michael Trimarchie30a3362008-11-28 13:22:09 +010086 /* Set to Host mode */
Vivek Mahajan32c52202009-06-19 17:56:00 +053087 setbits_le32(&ehci->usbmode, CM_HOST);
Michael Trimarchie30a3362008-11-28 13:22:09 +010088
Vivek Mahajan32c52202009-06-19 17:56:00 +053089 out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
90 out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
Michael Trimarchie30a3362008-11-28 13:22:09 +010091
92 /* Init phy */
Nikhil Badolaeb97e252013-12-19 11:08:46 +053093 if (hwconfig_sub(current_usb_controller, "phy_type"))
94 phy_type = hwconfig_subarg(current_usb_controller,
95 "phy_type", &len);
Vivek Mahajan288f7fb2009-05-25 17:23:16 +053096 else
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053097 phy_type = getenv("usb_phy_type");
98
99 if (!phy_type) {
100#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
101 /* if none specified assume internal UTMI */
102 strcpy(usb_phy, "utmi");
103 phy_type = usb_phy;
104#else
105 printf("WARNING: USB phy type not defined !!\n");
106 return -1;
107#endif
108 }
109
Nikhil Badola09a3b562014-02-17 16:58:36 +0530110 if (!strncmp(phy_type, "utmi", 4)) {
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530111#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
Nikhil Badola369f6632014-05-08 17:05:26 +0530112 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
113 PHY_CLK_SEL_UTMI);
114 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
115 UTMI_PHY_EN);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530116 udelay(1000); /* delay required for PHY Clk to appear */
117#endif
Lucas Stach3494a4c2012-09-26 00:14:35 +0200118 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
Nikhil Badola369f6632014-05-08 17:05:26 +0530119 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
120 USB_EN);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530121 } else {
Nikhil Badola369f6632014-05-08 17:05:26 +0530122 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
123 PHY_CLK_SEL_ULPI);
124 clrsetbits_be32(&ehci->control, UTMI_PHY_EN |
125 CONTROL_REGISTER_W1C_MASK, USB_EN);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530126 udelay(1000); /* delay required for PHY Clk to appear */
Shengzhou Liud407e1f2012-10-22 13:18:24 +0800127 if (!usb_phy_clk_valid(ehci))
128 return -EINVAL;
Lucas Stach3494a4c2012-09-26 00:14:35 +0200129 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530130 }
Michael Trimarchie30a3362008-11-28 13:22:09 +0100131
Vivek Mahajan32c52202009-06-19 17:56:00 +0530132 out_be32(&ehci->prictrl, 0x0000000c);
133 out_be32(&ehci->age_cnt_limit, 0x00000040);
134 out_be32(&ehci->sictrl, 0x00000001);
Michael Trimarchie30a3362008-11-28 13:22:09 +0100135
Vivek Mahajan32c52202009-06-19 17:56:00 +0530136 in_le32(&ehci->usbmode);
Michael Trimarchie30a3362008-11-28 13:22:09 +0100137
Nikhil Badola67f4b262014-10-17 09:12:07 +0530138 if (has_erratum_a007798())
Nikhil Badolab0b48da2014-04-07 08:46:14 +0530139 set_txfifothresh(ehci, TXFIFOTHRESH);
140
Michael Trimarchie30a3362008-11-28 13:22:09 +0100141 return 0;
142}
143
144/*
145 * Destroy the appropriate control structures corresponding
146 * the the EHCI host controller.
147 */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200148int ehci_hcd_stop(int index)
Michael Trimarchie30a3362008-11-28 13:22:09 +0100149{
150 return 0;
151}
Nikhil Badolab0b48da2014-04-07 08:46:14 +0530152
153/*
154 * Setting the value of TXFIFO_THRESH field in TXFILLTUNING register
155 * to counter DDR latencies in writing data into Tx buffer.
156 * This prevents Tx buffer from getting underrun
157 */
158static void set_txfifothresh(struct usb_ehci *ehci, u32 txfifo_thresh)
159{
160 u32 cmd;
161 cmd = ehci_readl(&ehci->txfilltuning);
162 cmd &= ~TXFIFO_THRESH_MASK;
163 cmd |= TXFIFO_THRESH(txfifo_thresh);
164 ehci_writel(&ehci->txfilltuning, cmd);
165}
Nikhil Badolab6fd44c2014-10-20 16:50:49 +0530166
167#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
168static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
169 const char *phy_type, int start_offset)
170{
171 const char *compat_dr = "fsl-usb2-dr";
172 const char *compat_mph = "fsl-usb2-mph";
173 const char *prop_mode = "dr_mode";
174 const char *prop_type = "phy_type";
175 const char *node_type = NULL;
176 int node_offset;
177 int err;
178
179 node_offset = fdt_node_offset_by_compatible(blob,
180 start_offset, compat_mph);
181 if (node_offset < 0) {
182 node_offset = fdt_node_offset_by_compatible(blob,
183 start_offset,
184 compat_dr);
185 if (node_offset < 0) {
186 printf("WARNING: could not find compatible node: %s",
187 fdt_strerror(node_offset));
188 return -1;
189 }
190 node_type = compat_dr;
191 } else {
192 node_type = compat_mph;
193 }
194
195 if (mode) {
196 err = fdt_setprop(blob, node_offset, prop_mode, mode,
197 strlen(mode) + 1);
198 if (err < 0)
199 printf("WARNING: could not set %s for %s: %s.\n",
200 prop_mode, node_type, fdt_strerror(err));
201 }
202
203 if (phy_type) {
204 err = fdt_setprop(blob, node_offset, prop_type, phy_type,
205 strlen(phy_type) + 1);
206 if (err < 0)
207 printf("WARNING: could not set %s for %s: %s.\n",
208 prop_type, node_type, fdt_strerror(err));
209 }
210
211 return node_offset;
212}
213
Nikhil Badola3d12d522014-09-30 11:24:07 +0530214static const char *fdt_usb_get_node_type(void *blob, int start_offset,
215 int *node_offset)
216{
217 const char *compat_dr = "fsl-usb2-dr";
218 const char *compat_mph = "fsl-usb2-mph";
219 const char *node_type = NULL;
220
221 *node_offset = fdt_node_offset_by_compatible(blob, start_offset,
222 compat_mph);
223 if (*node_offset < 0) {
224 *node_offset = fdt_node_offset_by_compatible(blob,
225 start_offset,
226 compat_dr);
227 if (*node_offset < 0) {
228 printf("ERROR: could not find compatible node: %s\n",
229 fdt_strerror(*node_offset));
230 } else {
231 node_type = compat_dr;
232 }
233 } else {
234 node_type = compat_mph;
235 }
236
237 return node_type;
238}
239
240static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
241 int start_offset)
242{
243 int node_offset, err;
244 const char *node_type = NULL;
245
246 node_type = fdt_usb_get_node_type(blob, start_offset, &node_offset);
247 if (!node_type)
248 return -1;
249
250 err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
251 if (err < 0) {
252 printf("ERROR: could not set %s for %s: %s.\n",
253 prop_erratum, node_type, fdt_strerror(err));
254 }
255
256 return node_offset;
257}
258
Nikhil Badolab6fd44c2014-10-20 16:50:49 +0530259void fdt_fixup_dr_usb(void *blob, bd_t *bd)
260{
261 static const char * const modes[] = { "host", "peripheral", "otg" };
262 static const char * const phys[] = { "ulpi", "utmi" };
Nikhil Badola3d12d522014-09-30 11:24:07 +0530263 int usb_erratum_a006261_off = -1;
264 int usb_erratum_a007075_off = -1;
Nikhil Badolab6fd44c2014-10-20 16:50:49 +0530265 int usb_mode_off = -1;
266 int usb_phy_off = -1;
267 char str[5];
268 int i, j;
269
270 for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
271 const char *dr_mode_type = NULL;
272 const char *dr_phy_type = NULL;
273 int mode_idx = -1, phy_idx = -1;
274
275 snprintf(str, 5, "%s%d", "usb", i);
276 if (hwconfig(str)) {
277 for (j = 0; j < ARRAY_SIZE(modes); j++) {
278 if (hwconfig_subarg_cmp(str, "dr_mode",
279 modes[j])) {
280 mode_idx = j;
281 break;
282 }
283 }
284
285 for (j = 0; j < ARRAY_SIZE(phys); j++) {
286 if (hwconfig_subarg_cmp(str, "phy_type",
287 phys[j])) {
288 phy_idx = j;
289 break;
290 }
291 }
292
293 if (mode_idx < 0 && phy_idx < 0) {
294 printf("WARNING: invalid phy or mode\n");
295 return;
296 }
297
298 if (mode_idx > -1)
299 dr_mode_type = modes[mode_idx];
300
301 if (phy_idx > -1)
302 dr_phy_type = phys[phy_idx];
303 }
304
305 usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
306 dr_mode_type, NULL,
307 usb_mode_off);
308
309 if (usb_mode_off < 0)
310 return;
311
312 usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
313 NULL, dr_phy_type,
314 usb_phy_off);
315
316 if (usb_phy_off < 0)
317 return;
Nikhil Badola3d12d522014-09-30 11:24:07 +0530318
319 if (has_erratum_a006261()) {
320 usb_erratum_a006261_off = fdt_fixup_usb_erratum
321 (blob,
322 "fsl,usb-erratum-a006261",
323 usb_erratum_a006261_off);
324 if (usb_erratum_a006261_off < 0)
325 return;
326 }
327 if (has_erratum_a007075()) {
328 usb_erratum_a007075_off = fdt_fixup_usb_erratum
329 (blob,
330 "fsl,usb-erratum-a007075",
331 usb_erratum_a007075_off);
332 if (usb_erratum_a007075_off < 0)
333 return;
334 }
Nikhil Badolab6fd44c2014-10-20 16:50:49 +0530335 }
336}
337#endif