Sandeep Paulraj | 46042ef | 2009-08-15 11:20:58 -0400 | [diff] [blame^] | 1 | /* |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or |
| 4 | * modify it under the terms of the GNU General Public License as |
| 5 | * published by the Free Software Foundation; either version 2 of |
| 6 | * the License, or (at your option) any later version. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program; if not, write to the Free Software |
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 16 | * MA 02111-1307 USA |
| 17 | */ |
| 18 | |
| 19 | #ifndef __CONFIG_H |
| 20 | #define __CONFIG_H |
| 21 | #include <asm/sizes.h> |
| 22 | |
| 23 | /* Spectrum Digital TMS320DM365 EVM board */ |
| 24 | #define DAVINCI_DM365EVM |
| 25 | |
| 26 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ |
| 27 | #define CONFIG_SKIP_RELOCATE_UBOOT |
| 28 | #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ |
| 29 | #define CONFIG_SYS_CONSOLE_INFO_QUIET |
| 30 | |
| 31 | /* SoC Configuration */ |
| 32 | #define CONFIG_ARM926EJS /* arm926ejs CPU */ |
| 33 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
| 34 | #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ |
| 35 | #define CONFIG_SYS_HZ 1000 |
| 36 | #define CONFIG_SOC_DM365 |
| 37 | |
| 38 | /* Memory Info */ |
| 39 | #define CONFIG_NR_DRAM_BANKS 1 |
| 40 | #define PHYS_SDRAM_1 0x80000000 |
| 41 | #define PHYS_SDRAM_1_SIZE SZ_128M |
| 42 | |
| 43 | /* Serial Driver info: UART0 for console */ |
| 44 | #define CONFIG_SYS_NS16550 |
| 45 | #define CONFIG_SYS_NS16550_SERIAL |
| 46 | #define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 47 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 |
| 48 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK |
| 49 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 50 | #define CONFIG_CONS_INDEX 1 |
| 51 | #define CONFIG_BAUDRATE 115200 |
| 52 | |
| 53 | /* EEPROM definitions for EEPROM on DM365 EVM */ |
| 54 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
| 55 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 56 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 |
| 57 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 |
| 58 | |
| 59 | /* Network Configuration */ |
| 60 | #define CONFIG_DRIVER_TI_EMAC |
| 61 | #define CONFIG_MII |
| 62 | #define CONFIG_BOOTP_DEFAULT |
| 63 | #define CONFIG_BOOTP_DNS |
| 64 | #define CONFIG_BOOTP_DNS2 |
| 65 | #define CONFIG_BOOTP_SEND_HOSTNAME |
| 66 | #define CONFIG_NET_RETRY_COUNT 10 |
| 67 | #define CONFIG_NET_MULTI |
| 68 | |
| 69 | /* I2C */ |
| 70 | #define CONFIG_HARD_I2C |
| 71 | #define CONFIG_DRIVER_DAVINCI_I2C |
| 72 | #define CONFIG_SYS_I2C_SPEED 400000 |
| 73 | #define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */ |
| 74 | |
| 75 | /* NAND: socketed, two chipselects, normally 2 GBytes */ |
| 76 | #define CONFIG_NAND_DAVINCI |
| 77 | #define CONFIG_SYS_NAND_HW_ECC |
| 78 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
| 79 | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST |
| 80 | #define CONFIG_SYS_NAND_PAGE_2K |
| 81 | |
| 82 | #define CONFIG_SYS_NAND_LARGEPAGE |
| 83 | #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } |
| 84 | /* socket has two chipselects, nCE0 gated by address BIT(14) */ |
| 85 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 86 | #define CONFIG_SYS_NAND_MAX_CHIPS 2 |
| 87 | |
| 88 | /* U-Boot command configuration */ |
| 89 | #include <config_cmd_default.h> |
| 90 | |
| 91 | #undef CONFIG_CMD_BDI |
| 92 | #undef CONFIG_CMD_FLASH |
| 93 | #undef CONFIG_CMD_FPGA |
| 94 | #undef CONFIG_CMD_SETGETDCR |
| 95 | |
| 96 | #define CONFIG_CMD_ASKENV |
| 97 | #define CONFIG_CMD_DHCP |
| 98 | #define CONFIG_CMD_I2C |
| 99 | #define CONFIG_CMD_PING |
| 100 | #define CONFIG_CMD_SAVES |
| 101 | #define CONFIG_CMD_SAVEENV |
| 102 | |
| 103 | #ifdef CONFIG_NAND_DAVINCI |
| 104 | #define CONFIG_CMD_MTDPARTS |
| 105 | #define CONFIG_MTD_PARTITIONS |
| 106 | #define CONFIG_MTD_DEVICE |
| 107 | #define CONFIG_CMD_NAND |
| 108 | #define CONFIG_CMD_UBI |
| 109 | #define CONFIG_RBTREE |
| 110 | #endif |
| 111 | |
| 112 | #define CONFIG_CRC32_VERIFY |
| 113 | #define CONFIG_MX_CYCLIC |
| 114 | |
| 115 | /* U-Boot general configuration */ |
| 116 | #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ |
| 117 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
| 118 | #define CONFIG_SYS_PROMPT "DM365 EVM # " /* Monitor Command Prompt */ |
| 119 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 120 | #define CONFIG_SYS_PBSIZE /* Print buffer size */ \ |
| 121 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 122 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 123 | #define CONFIG_SYS_HUSH_PARSER |
| 124 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| 125 | #define CONFIG_SYS_LONGHELP |
| 126 | |
| 127 | #ifdef CONFIG_NAND_DAVINCI |
| 128 | #define CONFIG_ENV_SIZE SZ_256K |
| 129 | #define CONFIG_ENV_IS_IN_NAND |
| 130 | #define CONFIG_ENV_OFFSET 0x3C0000 |
| 131 | #undef CONFIG_ENV_IS_IN_FLASH |
| 132 | #endif |
| 133 | |
| 134 | #define CONFIG_BOOTDELAY 3 |
| 135 | #define CONFIG_BOOTCOMMAND \ |
| 136 | "dhcp;bootm" |
| 137 | #define CONFIG_BOOTARGS \ |
| 138 | "console=ttyS0,115200n8 " \ |
| 139 | "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" |
| 140 | |
| 141 | #define CONFIG_CMDLINE_EDITING |
| 142 | #define CONFIG_VERSION_VARIABLE |
| 143 | #define CONFIG_TIMESTAMP |
| 144 | |
| 145 | /* U-Boot memory configuration */ |
| 146 | #define CONFIG_STACKSIZE SZ_256K /* regular stack */ |
| 147 | #define CONFIG_SYS_MALLOC_LEN SZ_1M /* malloc() arena */ |
| 148 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ |
| 149 | #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ |
| 150 | #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ |
| 151 | |
| 152 | /* Linux interfacing */ |
| 153 | #define CONFIG_CMDLINE_TAG |
| 154 | #define CONFIG_SETUP_MEMORY_TAGS |
| 155 | #define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ |
| 156 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ |
| 157 | |
| 158 | |
| 159 | /* NAND configuration issocketed with two chipselects just like the DM355 EVM. |
| 160 | * It normally comes with a 2GByte SLC part with 2KB pages |
| 161 | * (and 128KB erase blocks); other |
| 162 | * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC |
| 163 | * pretty much demands the 4-bit ECC support.) You can of course swap in |
| 164 | * other parts, including small page ones. |
| 165 | */ |
| 166 | #define MTDIDS_DEFAULT "nand0=davinci_nand.0" |
| 167 | |
| 168 | #ifdef CONFIG_SYS_NAND_LARGEPAGE |
| 169 | /* Use same layout for 128K/256K blocks; allow some bad blocks */ |
| 170 | #define PART_BOOT "2m(bootloader)ro," |
| 171 | #else |
| 172 | /* Assume 16K erase blocks; allow a few bad ones. */ |
| 173 | #define PART_BOOT "512k(bootloader)ro," |
| 174 | #endif |
| 175 | |
| 176 | #define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ |
| 177 | #define PART_REST "-(filesystem)" |
| 178 | |
| 179 | #define MTDPARTS_DEFAULT \ |
| 180 | "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST |
| 181 | |
| 182 | #endif /* __CONFIG_H */ |