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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Patrice Chotard22768d52017-11-15 13:14:44 +01002/*
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Patrice Chotard22768d52017-11-15 13:14:44 +01005 */
6
7#ifndef __STM32_PWR_H_
8
9/*
10 * Offsets of some PWR registers
11 */
12#define PWR_CR1_ODEN BIT(16)
13#define PWR_CR1_ODSWEN BIT(17)
14#define PWR_CSR1_ODRDY BIT(16)
15#define PWR_CSR1_ODSWRDY BIT(17)
16
17struct stm32_pwr_regs {
18 u32 cr1; /* power control register 1 */
19 u32 csr1; /* power control/status register 2 */
20};
21
22#endif /* __STM32_PWR_H_ */