| Felipe Balbi | 4750eb6 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com |
| 3 | * |
| 4 | * Author: Felipe Balbi <balbi@ti.com> |
| 5 | * |
| 6 | * Based on board/ti/dra7xx/evm.c |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | #ifndef _MUX_DATA_BEAGLE_X15_H_ |
| 11 | #define _MUX_DATA_BEAGLE_X15_H_ |
| 12 | |
| 13 | #include <asm/arch/mux_dra7xx.h> |
| 14 | |
| 15 | const struct pad_conf_entry core_padconf_array_essential[] = { |
| 16 | {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */ |
| 17 | {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */ |
| 18 | {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */ |
| 19 | {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */ |
| 20 | {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */ |
| 21 | {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */ |
| 22 | {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */ |
| 23 | {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */ |
| 24 | {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */ |
| 25 | {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */ |
| 26 | {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */ |
| 27 | {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */ |
| 28 | {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */ |
| 29 | {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */ |
| 30 | {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */ |
| 31 | {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */ |
| 32 | {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */ |
| 33 | {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */ |
| 34 | {UART3_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_RXD */ |
| 35 | {UART3_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_TXD */ |
| 36 | {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */ |
| 37 | {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */ |
| 38 | {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */ |
| 39 | {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */ |
| 40 | {RGMII0_TXC, (M0) }, |
| 41 | {RGMII0_TXCTL, (M0) }, |
| 42 | {RGMII0_TXD3, (M0) }, |
| 43 | {RGMII0_TXD2, (M0) }, |
| 44 | {RGMII0_TXD1, (M0) }, |
| 45 | {RGMII0_TXD0, (M0) }, |
| 46 | {RGMII0_RXC, (IEN | M0) }, |
| 47 | {RGMII0_RXCTL, (IEN | M0) }, |
| 48 | {RGMII0_RXD3, (IEN | M0) }, |
| 49 | {RGMII0_RXD2, (IEN | M0) }, |
| 50 | {RGMII0_RXD1, (IEN | M0) }, |
| 51 | {RGMII0_RXD0, (IEN | M0) }, |
| 52 | {USB1_DRVVBUS, (M0 | FSC) }, |
| 53 | {SPI1_CS1, (PEN | IDIS | M14) }, /* GPIO7_11 */ |
| 54 | }; |
| 55 | #endif /* _MUX_DATA_BEAGLE_X15_H_ */ |