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git01.mediatek.com / filogic / uboot / 45be8102524a661c3e876aa347b4f2b43fcf2bcb / . / arch / arm / dts / fsl-imx8qxp-mek-u-boot.dtsi
blob: 591eb66604bd4d1bc966d8b2e412e589a713be70 [file] [log] [blame]
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]3 * Copyright 2018, 2021 NXP
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]4 */
5
Oliver Grauted5efa3c2022-11-04 16:03:39 +0100[diff] [blame]6#include "imx8qxp-u-boot.dtsi"
7
Peng Fana31a5232019-03-07 12:43:37 +0000[diff] [blame]8&{/imx8qx-pm} {
9
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]10 bootph-pre-ram;
Peng Fana31a5232019-03-07 12:43:37 +0000[diff] [blame]11};
12
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]13&mu {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]14 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]15};
16
17&clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]18 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]19};
20
21&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]22 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]23};
24
25&pd_lsio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]26 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]27};
28
29&pd_lsio_gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]30 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]31};
32
33&pd_lsio_gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]34 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]35};
36
37&pd_lsio_gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]38 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]39};
40
41&pd_lsio_gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]42 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]43};
44
45&pd_lsio_gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]46 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]47};
48
49&pd_lsio_gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]50 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]51};
52
53&pd_lsio_gpio6 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]54 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]55};
56
57&pd_lsio_gpio7 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]59};
60
61&pd_conn {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]62 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]63};
64
65&pd_conn_sdch0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]66 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]67};
68
69&pd_conn_sdch1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]70 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]71};
72
73&pd_conn_sdch2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]74 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]75};
76
Peng Fan8064b7e2019-09-02 10:20:12 +0000[diff] [blame]77&pd_dma {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]78 bootph-pre-ram;
Peng Fan8064b7e2019-09-02 10:20:12 +0000[diff] [blame]79};
80
81&pd_dma_lpuart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]82 bootph-pre-ram;
Peng Fan8064b7e2019-09-02 10:20:12 +0000[diff] [blame]83};
84
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]85&pd_caam {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]86 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]87};
88
89&pd_caam_jr1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]90 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]91};
92
93&pd_caam_jr2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]94 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]95};
96
97&pd_caam_jr3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]98 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]99};
100
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]101&gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]102 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]103};
104
105&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]106 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]107};
108
109&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]110 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]111};
112
113&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]114 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]115};
116
117&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]118 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]119};
120
121&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]122 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]123};
124
125&gpio6 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]126 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]127};
128
129&gpio7 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]130 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]131};
132
133&lpuart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]134 bootph-pre-ram;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]135};
136
137&usdhc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]138 bootph-pre-ram;
Andrey Zhizhikin9aa95982020-12-05 17:29:18 +0000[diff] [blame]139 mmc-hs400-1_8v;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]140};
141
142&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]143 bootph-pre-ram;
Andrey Zhizhikin9aa95982020-12-05 17:29:18 +0000[diff] [blame]144 sd-uhs-sdr104;
145 sd-uhs-ddr50;
Peng Fan24063f92018-12-21 06:21:26 +0000[diff] [blame]146};
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]147
148&crypto {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]149 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]150};
151
152&sec_jr1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]153 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]154};
155
156&sec_jr2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]157 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]158};
159
160&sec_jr3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]161 bootph-pre-ram;
Gaurav Jainb91e58b2022-03-24 11:50:32 +0530[diff] [blame]162};