| Michal Simek | 52cc06a | 2019-04-11 10:35:37 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * dts file for Xilinx Versal a2197 RevA System Controller |
| 4 | * |
| 5 | * (C) Copyright 2019, Xilinx, Inc. |
| 6 | * |
| 7 | * Michal Simek <michal.simek@xilinx.com> |
| 8 | */ |
| 9 | /dts-v1/; |
| 10 | |
| 11 | #include "zynqmp.dtsi" |
| 12 | #include "zynqmp-clk-ccf.dtsi" |
| 13 | #include <dt-bindings/gpio/gpio.h> |
| 14 | |
| 15 | / { |
| 16 | model = "Versal System Controller on a2197 board RevA"; |
| 17 | compatible = "xlnx,zynqmp-a2197-revA", "xlnx,zynqmp-a2197", "xlnx,zynqmp"; |
| 18 | |
| 19 | aliases { |
| 20 | i2c0 = &i2c0; |
| 21 | serial0 = &uart0; |
| 22 | }; |
| 23 | |
| 24 | chosen { |
| 25 | bootargs = "earlycon"; |
| 26 | stdout-path = "serial0:115200n8"; |
| 27 | xlnx,eeprom = <&eeprom1 &eeprom0 &eeprom0>; |
| 28 | }; |
| 29 | |
| 30 | memory@0 { |
| 31 | device_type = "memory"; |
| 32 | reg = <0x0 0x0 0x0 0x80000000>; |
| 33 | }; |
| 34 | }; |
| 35 | |
| 36 | &uart0 { /* uart0 MIO38-39 */ |
| 37 | status = "okay"; |
| Michal Simek | 52cc06a | 2019-04-11 10:35:37 +0200 | [diff] [blame] | 38 | }; |
| 39 | |
| 40 | &i2c0 { |
| 41 | status = "okay"; |
| 42 | u-boot,dm-pre-reloc; |
| 43 | clock-frequency = <400000>; |
| 44 | i2c-mux@74 { /* this cover MGT board */ |
| 45 | compatible = "nxp,pca9548"; |
| 46 | #address-cells = <1>; |
| 47 | #size-cells = <0>; |
| 48 | reg = <0x74>; |
| 49 | u-boot,dm-pre-reloc; |
| 50 | /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ |
| 51 | i2c@0 { |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <0>; |
| 54 | reg = <0>; |
| 55 | /* Use for storing information about SC board */ |
| 56 | eeprom0: eeprom@50 { /* u96 - 24LC32A - 256B */ |
| 57 | compatible = "atmel,24c32"; |
| 58 | u-boot,dm-pre-reloc; |
| 59 | reg = <0x50>; |
| 60 | }; |
| 61 | }; |
| 62 | }; |
| 63 | }; |
| 64 | |
| 65 | &i2c1 { |
| 66 | status = "okay"; |
| 67 | u-boot,dm-pre-reloc; |
| 68 | clock-frequency = <400000>; |
| 69 | i2c-mux@74 { /* This cover processor board */ |
| 70 | compatible = "nxp,pca9548"; |
| 71 | #address-cells = <1>; |
| 72 | #size-cells = <0>; |
| 73 | reg = <0x74>; |
| 74 | u-boot,dm-pre-reloc; |
| 75 | /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ |
| 76 | i2c@0 { |
| 77 | #address-cells = <1>; |
| 78 | #size-cells = <0>; |
| 79 | reg = <0>; |
| 80 | /* Use for storing information about SC board */ |
| 81 | eeprom1: eeprom@50 { /* u96 - 24LC32A - 256B */ |
| 82 | compatible = "atmel,24c32"; |
| 83 | u-boot,dm-pre-reloc; |
| 84 | reg = <0x50>; |
| 85 | }; |
| 86 | }; |
| 87 | }; |
| 88 | }; |