Andre Przywara | 35196f1 | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz> |
| 3 | * |
| 4 | * Based on sun50i-a64-pine64.dts, which is: |
| 5 | * Copyright (c) 2016 ARM Ltd. |
| 6 | * |
| 7 | * This file is dual-licensed: you can use it either under the terms |
| 8 | * of the GPL or the X11 license, at your option. Note that this dual |
| 9 | * licensing only applies to this file, and not this project as a |
| 10 | * whole. |
| 11 | * |
| 12 | * a) This library is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of the |
| 15 | * License, or (at your option) any later version. |
| 16 | * |
| 17 | * This library is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * Or, alternatively, |
| 23 | * |
| 24 | * b) Permission is hereby granted, free of charge, to any person |
| 25 | * obtaining a copy of this software and associated documentation |
| 26 | * files (the "Software"), to deal in the Software without |
| 27 | * restriction, including without limitation the rights to use, |
| 28 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 29 | * sell copies of the Software, and to permit persons to whom the |
| 30 | * Software is furnished to do so, subject to the following |
| 31 | * conditions: |
| 32 | * |
| 33 | * The above copyright notice and this permission notice shall be |
| 34 | * included in all copies or substantial portions of the Software. |
| 35 | * |
| 36 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 37 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 38 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 39 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 40 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 41 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 42 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 43 | * OTHER DEALINGS IN THE SOFTWARE. |
| 44 | */ |
| 45 | |
| 46 | #include "sun50i-a64.dtsi" |
| 47 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 48 | #include <dt-bindings/gpio/gpio.h> |
| 49 | |
Andre Przywara | 35196f1 | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 50 | &mmc0 { |
| 51 | pinctrl-names = "default"; |
| 52 | pinctrl-0 = <&mmc0_pins>; |
| 53 | vmmc-supply = <®_dcdc1>; |
| 54 | non-removable; |
| 55 | disable-wp; |
| 56 | bus-width = <4>; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 57 | cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ |
Andre Przywara | 35196f1 | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 58 | status = "okay"; |
| 59 | }; |
| 60 | |
| 61 | &r_rsb { |
| 62 | status = "okay"; |
| 63 | |
| 64 | axp803: pmic@3a3 { |
| 65 | compatible = "x-powers,axp803"; |
| 66 | reg = <0x3a3>; |
| 67 | interrupt-parent = <&r_intc>; |
| 68 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
| 69 | }; |
| 70 | }; |
| 71 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 72 | &spi0 { |
| 73 | status = "okay"; |
| 74 | |
| 75 | flash@0 { |
| 76 | #address-cells = <1>; |
| 77 | #size-cells = <1>; |
| 78 | compatible = "jedec,spi-nor"; |
| 79 | reg = <0>; |
| 80 | spi-max-frequency = <40000000>; |
| 81 | }; |
| 82 | }; |
| 83 | |
Andre Przywara | 35196f1 | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 84 | #include "axp803.dtsi" |
| 85 | |
| 86 | ®_aldo2 { |
| 87 | regulator-always-on; |
| 88 | regulator-min-microvolt = <1800000>; |
| 89 | regulator-max-microvolt = <3300000>; |
| 90 | regulator-name = "vcc-pl"; |
| 91 | }; |
| 92 | |
| 93 | ®_aldo3 { |
| 94 | regulator-always-on; |
| 95 | regulator-min-microvolt = <3000000>; |
| 96 | regulator-max-microvolt = <3000000>; |
| 97 | regulator-name = "vcc-pll-avcc"; |
| 98 | }; |
| 99 | |
| 100 | ®_dcdc1 { |
| 101 | regulator-always-on; |
| 102 | regulator-min-microvolt = <3300000>; |
| 103 | regulator-max-microvolt = <3300000>; |
| 104 | regulator-name = "vcc-3v3"; |
| 105 | }; |
| 106 | |
| 107 | ®_dcdc2 { |
| 108 | regulator-always-on; |
| 109 | regulator-min-microvolt = <1040000>; |
| 110 | regulator-max-microvolt = <1300000>; |
| 111 | regulator-name = "vdd-cpux"; |
| 112 | }; |
| 113 | |
| 114 | /* DCDC3 is polyphased with DCDC2 */ |
| 115 | |
| 116 | ®_dcdc5 { |
| 117 | regulator-always-on; |
| 118 | regulator-min-microvolt = <1200000>; |
| 119 | regulator-max-microvolt = <1200000>; |
| 120 | regulator-name = "vcc-dram"; |
| 121 | }; |
| 122 | |
| 123 | ®_dcdc6 { |
| 124 | regulator-always-on; |
| 125 | regulator-min-microvolt = <1100000>; |
| 126 | regulator-max-microvolt = <1100000>; |
| 127 | regulator-name = "vdd-sys"; |
| 128 | }; |
| 129 | |
| 130 | ®_eldo1 { |
| 131 | regulator-always-on; |
| 132 | regulator-min-microvolt = <1800000>; |
| 133 | regulator-max-microvolt = <1800000>; |
| 134 | regulator-name = "vdd-1v8-lpddr"; |
| 135 | }; |
| 136 | |
| 137 | ®_fldo1 { |
| 138 | regulator-min-microvolt = <1200000>; |
| 139 | regulator-max-microvolt = <1200000>; |
| 140 | regulator-name = "vcc-1v2-hsic"; |
| 141 | }; |
| 142 | |
| 143 | /* |
| 144 | * The A64 chip cannot work without this regulator off, although |
| 145 | * it seems to be only driving the AR100 core. |
| 146 | * Maybe we don't still know well about CPUs domain. |
| 147 | */ |
| 148 | ®_fldo2 { |
| 149 | regulator-always-on; |
| 150 | regulator-min-microvolt = <1100000>; |
| 151 | regulator-max-microvolt = <1100000>; |
| 152 | regulator-name = "vdd-cpus"; |
| 153 | }; |
| 154 | |
| 155 | ®_rtc_ldo { |
| 156 | regulator-name = "vcc-rtc"; |
| 157 | }; |