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Vikas Manocha4515ffe2017-04-10 15:02:56 -07001#ifndef DT_BINDINGS_STM32_SDRAM_H
2#define DT_BINDINGS_STM32_SDRAM_H
3
4#define NO_COL_8 0x0
5#define NO_COL_9 0x1
6#define NO_COL_10 0x2
7#define NO_COL_11 0x3
8
9#define NO_ROW_11 0x0
10#define NO_ROW_12 0x1
11#define NO_ROW_13 0x2
12
13#define MWIDTH_8 0x0
14#define MWIDTH_16 0x1
15#define MWIDTH_32 0x2
16#define BANKS_2 0x0
17#define BANKS_4 0x1
18#define CAS_1 0x1
19#define CAS_2 0x2
20#define CAS_3 0x3
21#define RD_BURST_EN 0x1
22#define RD_BURST_DIS 0x0
23#define RD_PIPE_DL_0 0x0
24#define RD_PIPE_DL_1 0x1
25#define RD_PIPE_DL_2 0x2
26
27#define TMRD_1 0x1
28#define TXSR_60 60
29#define TRAS_42 42
30#define TRC_60 60
31#define TRP_18 18
32#define TRCD_18 18
33
34#endif