blob: 6fbd2679f0998961733a545a48101bbb94320dee [file] [log] [blame]
Heiko Stuebneraff82aa2019-07-16 22:17:13 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6#ifndef __CONFIG_PX30_COMMON_H
7#define __CONFIG_PX30_COMMON_H
8
9#include "rockchip-common.h"
10
Quentin Schulzfac3baa2023-01-09 11:36:41 +010011#define CFG_IRAM_BASE 0xff0e0000
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020012
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020013#define GICD_BASE 0xff131000
14#define GICC_BASE 0xff132000
15
Tom Rinibb4dd962022-11-16 13:10:37 -050016#define CFG_SYS_SDRAM_BASE 0
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020017#define SDRAM_MAX_SIZE 0xff000000
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020018
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020019#define ENV_MEM_LAYOUT_SETTINGS \
20 "scriptaddr=0x00500000\0" \
21 "pxefile_addr_r=0x00600000\0" \
22 "fdt_addr_r=0x08300000\0" \
23 "kernel_addr_r=0x00280000\0" \
24 "kernel_addr_c=0x03e80000\0" \
25 "ramdisk_addr_r=0x0a200000\0"
26
Tom Rinic9edebe2022-12-04 10:03:50 -050027#define CFG_EXTRA_ENV_SETTINGS \
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020028 ENV_MEM_LAYOUT_SETTINGS \
29 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
30 "partitions=" PARTS_DEFAULT \
31 ROCKCHIP_DEVICE_SETTINGS \
Simon Glassf27e9d52023-04-24 13:49:51 +120032 "boot_targets=" BOOT_TARGETS "\0"
Heiko Stuebneraff82aa2019-07-16 22:17:13 +020033
34#endif