| Christophe Leroy | 1fc46f5 | 2022-10-14 12:54:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2022 CS Group |
| 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_H |
| 7 | #define __CONFIG_H |
| 8 | |
| 9 | /* Definitions for initial stack pointer and data area (in DPRAM) */ |
| 10 | #define CFG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) |
| 11 | #define CFG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) |
| Christophe Leroy | e65975f | 2023-05-04 10:20:35 +0200 | [diff] [blame] | 12 | #define CFG_SYS_INIT_SP (CONFIG_SYS_IMMR + 0x3c00) |
| Christophe Leroy | 1fc46f5 | 2022-10-14 12:54:50 +0200 | [diff] [blame] | 13 | |
| 14 | /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */ |
| 15 | #define CFG_SYS_SDRAM_BASE 0x00000000 |
| 16 | |
| 17 | /* FLASH Configuration */ |
| 18 | #define CFG_SYS_FLASH_BASE 0x40000000 |
| 19 | |
| 20 | /* |
| 21 | * For booting Linux, the board info and command line data |
| 22 | * have to be in the first 24 MB of memory, since this is |
| 23 | * the maximum mapped by the Linux kernel during initialization. |
| 24 | */ |
| 25 | #define CFG_SYS_BOOTMAPSZ (32 << 20) |
| 26 | |
| 27 | /* NAND configuration part */ |
| 28 | #define CFG_SYS_NAND_BASE 0xC0000000 |
| 29 | |
| Christophe Leroy | 452fd72 | 2023-04-05 18:50:23 +0200 | [diff] [blame] | 30 | /* Board names */ |
| 31 | #define CFG_BOARD_CMPCXXX "cmpc885" |
| 32 | #define CFG_BOARD_MCR3000_2G "mcr3k_2g" |
| 33 | #define CFG_BOARD_VGOIP "vgoip" |
| 34 | #define CFG_BOARD_MIAE "miae" |
| 35 | |
| Christophe Leroy | 1fc46f5 | 2022-10-14 12:54:50 +0200 | [diff] [blame] | 36 | #endif /* __CONFIG_H */ |