Masahiro Yamada | d5f8fee | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_TEGRA=y | ||||
3 | CONFIG_TEGRA124=y | ||||
4 | CONFIG_TARGET_NYAN_BIG=y | ||||
Allen Martin | a142ac7 | 2014-12-04 06:36:30 -0700 | [diff] [blame] | 5 | CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" |
Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 6 | CONFIG_FIT=y |
7 | CONFIG_FIT_BEST_MATCH=y | ||||
8 | CONFIG_OF_SYSTEM_SETUP=y | ||||
Simon Glass | 3110ece | 2016-10-17 20:13:02 -0600 | [diff] [blame] | 9 | CONFIG_SYS_STDIO_DEREGISTER=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 10 | CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 11 | # CONFIG_CMD_IMI is not set |
12 | # CONFIG_CMD_IMLS is not set | ||||
13 | # CONFIG_CMD_FLASH is not set | ||||
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 14 | CONFIG_CMD_MMC=y |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 15 | CONFIG_CMD_SF=y |
16 | CONFIG_CMD_SPI=y | ||||
17 | CONFIG_CMD_I2C=y | ||||
18 | CONFIG_CMD_USB=y | ||||
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 19 | CONFIG_CMD_DFU=y |
20 | CONFIG_CMD_USB_MASS_STORAGE=y | ||||
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 21 | # CONFIG_CMD_FPGA is not set |
Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 22 | CONFIG_CMD_GPIO=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 23 | # CONFIG_CMD_SETEXPR is not set |
24 | # CONFIG_CMD_NFS is not set | ||||
Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 25 | CONFIG_CMD_PMIC=y |
26 | CONFIG_CMD_REGULATOR=y | ||||
Simon Glass | 1e823cf | 2015-08-22 18:31:44 -0600 | [diff] [blame] | 27 | CONFIG_CMD_TPM=y |
28 | CONFIG_CMD_TPM_TEST=y | ||||
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 29 | CONFIG_CMD_EXT4_WRITE=y |
Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 30 | CONFIG_SPL_DM=y |
Simon Glass | 7b8492e | 2016-10-01 14:43:18 -0600 | [diff] [blame] | 31 | # CONFIG_BLK is not set |
Tom Rini | 265c7da | 2016-09-19 13:31:30 -0400 | [diff] [blame] | 32 | CONFIG_DFU_MMC=y |
33 | CONFIG_DFU_RAM=y | ||||
34 | CONFIG_DFU_SF=y | ||||
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 35 | CONFIG_CROS_EC_KEYB=y |
Simon Glass | 3aa5d4a | 2015-06-05 14:39:34 -0600 | [diff] [blame] | 36 | CONFIG_CROS_EC=y |
37 | CONFIG_CROS_EC_SPI=y | ||||
Simon Glass | 0bf1f49 | 2016-10-01 14:43:19 -0600 | [diff] [blame] | 38 | # CONFIG_DM_MMC_OPS is not set |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 39 | CONFIG_SPI_FLASH=y |
Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 40 | CONFIG_SPI_FLASH_WINBOND=y |
Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 41 | CONFIG_DM_PMIC=y |
42 | CONFIG_DM_REGULATOR=y | ||||
43 | CONFIG_DM_REGULATOR_FIXED=y | ||||
Simon Glass | 90836ff | 2016-01-30 16:38:00 -0700 | [diff] [blame] | 44 | CONFIG_PWM_TEGRA=y |
Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 45 | CONFIG_SYS_NS16550=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 46 | CONFIG_TEGRA114_SPI=y |
Christophe Ricard | 8759ff8 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 47 | CONFIG_TPM_TIS_INFINEON=y |
Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 48 | CONFIG_USB=y |
49 | CONFIG_DM_USB=y | ||||
Tom Rini | 6e9cb11 | 2016-09-08 16:31:26 -0400 | [diff] [blame] | 50 | CONFIG_USB_STORAGE=y |
Sam Protsenko | b084b0c | 2016-03-25 16:39:47 +0200 | [diff] [blame] | 51 | CONFIG_USB_GADGET=y |
Sam Protsenko | b4a0bf7 | 2016-04-13 14:20:25 +0300 | [diff] [blame] | 52 | CONFIG_CI_UDC=y |
Sam Protsenko | 4d2439d | 2016-04-13 14:20:26 +0300 | [diff] [blame] | 53 | CONFIG_USB_GADGET_DOWNLOAD=y |
Sam Protsenko | b706ffd | 2016-04-13 14:20:30 +0300 | [diff] [blame] | 54 | CONFIG_G_DNL_MANUFACTURER="NVIDIA" |
55 | CONFIG_G_DNL_VENDOR_NUM=0x0955 | ||||
56 | CONFIG_G_DNL_PRODUCT_NUM=0x701a | ||||
Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 57 | CONFIG_DM_VIDEO=y |
Bin Meng | 6dd8ddc | 2016-03-21 06:47:40 -0700 | [diff] [blame] | 58 | CONFIG_DISPLAY=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 59 | CONFIG_VIDEO_TEGRA124=y |
Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 60 | CONFIG_VIDEO_BRIDGE=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 61 | CONFIG_TPM=y |
Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 62 | CONFIG_ERRNO_STR=y |