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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Tom Warrenf7bc6242012-12-21 16:09:52 -07002/*
3 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
Tom Warrenf7bc6242012-12-21 16:09:52 -07004 */
5
6#ifndef __CONFIG_H
7#define __CONFIG_H
8
Alexey Brodkin267d8e22014-02-26 17:47:58 +04009#include <linux/sizes.h>
Tom Warrenf7bc6242012-12-21 16:09:52 -070010
11#include "tegra30-common.h"
12
Stephen Warrenecc75382014-05-08 09:33:45 -060013/* VDD core PMIC */
14#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
15
Tom Warrenf7bc6242012-12-21 16:09:52 -070016/* High-level configuration options */
Tom Warrenf7bc6242012-12-21 16:09:52 -070017#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
18
Stephen Warren26b02f12014-01-23 13:17:01 -070019#define BOARD_EXTRA_ENV_SETTINGS \
20 "board_name=cardhu-a04\0" \
21 "fdtfile=tegra30-cardhu-a04.dtb\0"
22
Tom Warrenf7bc6242012-12-21 16:09:52 -070023/* Board-specific serial config */
Tom Warrenf7bc6242012-12-21 16:09:52 -070024#define CONFIG_TEGRA_ENABLE_UARTA
25#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
26
Tom Rini48157342017-01-25 20:42:35 -050027#define CONFIG_MACH_TYPE MACH_TYPE_CARDHU
28
Tom Warren41cdd3f2013-02-26 12:36:22 -070029/* Environment in eMMC, at the end of 2nd "boot sector" */
Stephen Warren46597a32013-06-11 15:14:03 -060030#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
Tom Warren41cdd3f2013-02-26 12:36:22 -070031#define CONFIG_SYS_MMC_ENV_DEV 0
32#define CONFIG_SYS_MMC_ENV_PART 2
Tom Warrenf7bc6242012-12-21 16:09:52 -070033
Allen Martin7ea853e2013-01-29 13:51:29 +000034/* SPI */
Allen Martin7ea853e2013-01-29 13:51:29 +000035#define CONFIG_TEGRA_SLINK_CTRLS 6
Allen Martin7ea853e2013-01-29 13:51:29 +000036#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
37#define CONFIG_SF_DEFAULT_SPEED 24000000
Allen Martin7ea853e2013-01-29 13:51:29 +000038#define CONFIG_SPI_FLASH_SIZE (4 << 20)
39
Tom Warrenf7bc6242012-12-21 16:09:52 -070040#include "tegra-common-post.h"
41
42#endif /* __CONFIG_H */