blob: 24cb604e3e30380bb71334b95ad9e521d5b55b97 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ian Campbellaf471472014-06-05 19:00:15 +01002/*
3 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
6 *
7 * (C) Copyright 2007-2011
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9 * Tom Cubie <tangliang@allwinnertech.com>
Ian Campbellaf471472014-06-05 19:00:15 +010010 */
11
12#include <common.h>
Simon Glass78304532014-10-30 20:25:49 -060013#include <dm.h>
14#include <errno.h>
15#include <fdtdec.h>
16#include <malloc.h>
Hans de Goede3ae1d132015-04-25 17:25:14 +020017#include <asm/arch/gpio.h>
Ian Campbellaf471472014-06-05 19:00:15 +010018#include <asm/io.h>
19#include <asm/gpio.h>
Simon Glass78304532014-10-30 20:25:49 -060020#include <dm/device-internal.h>
Chen-Yu Tsaif3aa2822016-07-22 16:12:59 +080021#include <dt-bindings/gpio/gpio.h>
Ian Campbellaf471472014-06-05 19:00:15 +010022
Simon Glass78304532014-10-30 20:25:49 -060023#define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR
24
Simon Glassb75b15b2020-12-03 16:55:23 -070025struct sunxi_gpio_plat {
Simon Glass78304532014-10-30 20:25:49 -060026 struct sunxi_gpio *regs;
27 const char *bank_name; /* Name of bank, e.g. "B" */
28 int gpio_count;
29};
30
Simon Glassfa4689a2019-12-06 21:41:35 -070031#if !CONFIG_IS_ENABLED(DM_GPIO)
Ian Campbellaf471472014-06-05 19:00:15 +010032static int sunxi_gpio_output(u32 pin, u32 val)
33{
34 u32 dat;
35 u32 bank = GPIO_BANK(pin);
36 u32 num = GPIO_NUM(pin);
37 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
38
39 dat = readl(&pio->dat);
40 if (val)
41 dat |= 0x1 << num;
42 else
43 dat &= ~(0x1 << num);
44
45 writel(dat, &pio->dat);
46
47 return 0;
48}
49
50static int sunxi_gpio_input(u32 pin)
51{
52 u32 dat;
53 u32 bank = GPIO_BANK(pin);
54 u32 num = GPIO_NUM(pin);
55 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
56
57 dat = readl(&pio->dat);
58 dat >>= num;
59
60 return dat & 0x1;
61}
62
63int gpio_request(unsigned gpio, const char *label)
64{
65 return 0;
66}
67
68int gpio_free(unsigned gpio)
69{
70 return 0;
71}
72
73int gpio_direction_input(unsigned gpio)
74{
75 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
76
Axel Lin06da3462014-12-20 11:41:25 +080077 return 0;
Ian Campbellaf471472014-06-05 19:00:15 +010078}
79
80int gpio_direction_output(unsigned gpio, int value)
81{
82 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
83
84 return sunxi_gpio_output(gpio, value);
85}
86
87int gpio_get_value(unsigned gpio)
88{
89 return sunxi_gpio_input(gpio);
90}
91
92int gpio_set_value(unsigned gpio, int value)
93{
94 return sunxi_gpio_output(gpio, value);
95}
96
97int sunxi_name_to_gpio(const char *name)
98{
99 int group = 0;
100 int groupsize = 9 * 32;
101 long pin;
102 char *eptr;
Hans de Goede1fc9c4a2014-12-24 19:34:38 +0100103
Ian Campbellaf471472014-06-05 19:00:15 +0100104 if (*name == 'P' || *name == 'p')
105 name++;
106 if (*name >= 'A') {
107 group = *name - (*name > 'a' ? 'a' : 'A');
108 groupsize = 32;
109 name++;
110 }
111
112 pin = simple_strtol(name, &eptr, 10);
113 if (!*name || *eptr)
114 return -1;
115 if (pin < 0 || pin > groupsize || group >= 9)
116 return -1;
117 return group * 32 + pin;
118}
Simon Glassfa4689a2019-12-06 21:41:35 -0700119#endif /* DM_GPIO */
Simon Glass78304532014-10-30 20:25:49 -0600120
Hans de Goededfa5b9f2015-04-22 17:59:01 +0200121int sunxi_name_to_gpio_bank(const char *name)
122{
123 int group = 0;
124
125 if (*name == 'P' || *name == 'p')
126 name++;
127 if (*name >= 'A') {
128 group = *name - (*name > 'a' ? 'a' : 'A');
129 return group;
130 }
131
132 return -1;
133}
134
Simon Glassfa4689a2019-12-06 21:41:35 -0700135#if CONFIG_IS_ENABLED(DM_GPIO)
Simon Glass9754d932015-04-18 11:33:43 -0600136/* TODO(sjg@chromium.org): Remove this function and use device tree */
137int sunxi_name_to_gpio(const char *name)
138{
139 unsigned int gpio;
140 int ret;
Hans de Goede08607d12015-04-22 11:31:22 +0200141#if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
142 char lookup[8];
Simon Glass9754d932015-04-18 11:33:43 -0600143
Hans de Goede08607d12015-04-22 11:31:22 +0200144 if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
145 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
146 SUNXI_GPIO_AXP0_VBUS_DETECT);
147 name = lookup;
148 } else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
149 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
150 SUNXI_GPIO_AXP0_VBUS_ENABLE);
151 name = lookup;
152 }
153#endif
Simon Glass9754d932015-04-18 11:33:43 -0600154 ret = gpio_lookup_name(name, NULL, NULL, &gpio);
155
156 return ret ? ret : gpio;
157}
158
Simon Glass78304532014-10-30 20:25:49 -0600159static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
160{
Simon Glassb75b15b2020-12-03 16:55:23 -0700161 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass78304532014-10-30 20:25:49 -0600162
163 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
164
165 return 0;
166}
167
168static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
169 int value)
170{
Simon Glassb75b15b2020-12-03 16:55:23 -0700171 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass78304532014-10-30 20:25:49 -0600172 u32 num = GPIO_NUM(offset);
173
174 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
175 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
176
177 return 0;
178}
179
180static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
181{
Simon Glassb75b15b2020-12-03 16:55:23 -0700182 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass78304532014-10-30 20:25:49 -0600183 u32 num = GPIO_NUM(offset);
184 unsigned dat;
185
186 dat = readl(&plat->regs->dat);
187 dat >>= num;
188
189 return dat & 0x1;
190}
191
192static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
193 int value)
194{
Simon Glassb75b15b2020-12-03 16:55:23 -0700195 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass78304532014-10-30 20:25:49 -0600196 u32 num = GPIO_NUM(offset);
197
198 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
199 return 0;
200}
201
202static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
203{
Simon Glassb75b15b2020-12-03 16:55:23 -0700204 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass78304532014-10-30 20:25:49 -0600205 int func;
206
207 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
208 if (func == SUNXI_GPIO_OUTPUT)
209 return GPIOF_OUTPUT;
210 else if (func == SUNXI_GPIO_INPUT)
211 return GPIOF_INPUT;
212 else
213 return GPIOF_FUNC;
214}
215
Chen-Yu Tsaif3aa2822016-07-22 16:12:59 +0800216static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
Simon Glass12faa022017-05-18 20:09:18 -0600217 struct ofnode_phandle_args *args)
Chen-Yu Tsaif3aa2822016-07-22 16:12:59 +0800218{
219 int ret;
220
221 ret = device_get_child(dev, args->args[0], &desc->dev);
222 if (ret)
223 return ret;
224 desc->offset = args->args[1];
225 desc->flags = args->args[2] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
226
227 return 0;
228}
229
Simon Glass78304532014-10-30 20:25:49 -0600230static const struct dm_gpio_ops gpio_sunxi_ops = {
231 .direction_input = sunxi_gpio_direction_input,
232 .direction_output = sunxi_gpio_direction_output,
233 .get_value = sunxi_gpio_get_value,
234 .set_value = sunxi_gpio_set_value,
235 .get_function = sunxi_gpio_get_function,
Chen-Yu Tsaif3aa2822016-07-22 16:12:59 +0800236 .xlate = sunxi_gpio_xlate,
Simon Glass78304532014-10-30 20:25:49 -0600237};
238
239/**
240 * Returns the name of a GPIO bank
241 *
242 * GPIO banks are named A, B, C, ...
243 *
244 * @bank: Bank number (0, 1..n-1)
245 * @return allocated string containing the name
246 */
247static char *gpio_bank_name(int bank)
248{
249 char *name;
250
Simon Glasse2d30542015-04-18 11:33:44 -0600251 name = malloc(3);
Simon Glass78304532014-10-30 20:25:49 -0600252 if (name) {
Simon Glasse2d30542015-04-18 11:33:44 -0600253 name[0] = 'P';
254 name[1] = 'A' + bank;
255 name[2] = '\0';
Simon Glass78304532014-10-30 20:25:49 -0600256 }
257
258 return name;
259}
260
261static int gpio_sunxi_probe(struct udevice *dev)
262{
Simon Glassb75b15b2020-12-03 16:55:23 -0700263 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glassde0977b2015-03-05 12:25:20 -0700264 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Simon Glass78304532014-10-30 20:25:49 -0600265
266 /* Tell the uclass how many GPIOs we have */
267 if (plat) {
268 uc_priv->gpio_count = plat->gpio_count;
269 uc_priv->bank_name = plat->bank_name;
270 }
271
272 return 0;
273}
Stephen Warrenb56989e2016-05-11 15:26:25 -0600274
275struct sunxi_gpio_soc_data {
276 int start;
277 int no_banks;
278};
279
Simon Glass78304532014-10-30 20:25:49 -0600280/**
281 * We have a top-level GPIO device with no actual GPIOs. It has a child
282 * device for each Sunxi bank.
283 */
284static int gpio_sunxi_bind(struct udevice *parent)
285{
Stephen Warrenb56989e2016-05-11 15:26:25 -0600286 struct sunxi_gpio_soc_data *soc_data =
287 (struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
Simon Glass95588622020-12-22 19:30:28 -0700288 struct sunxi_gpio_plat *plat = dev_get_plat(parent);
Simon Glass78304532014-10-30 20:25:49 -0600289 struct sunxi_gpio_reg *ctlr;
Stephen Warrenb56989e2016-05-11 15:26:25 -0600290 int bank, ret;
Simon Glass78304532014-10-30 20:25:49 -0600291
292 /* If this is a child device, there is nothing to do here */
293 if (plat)
294 return 0;
295
Masahiro Yamada1096ae12020-07-17 14:36:46 +0900296 ctlr = dev_read_addr_ptr(parent);
Stephen Warrenb56989e2016-05-11 15:26:25 -0600297 for (bank = 0; bank < soc_data->no_banks; bank++) {
Simon Glassb75b15b2020-12-03 16:55:23 -0700298 struct sunxi_gpio_plat *plat;
Simon Glass78304532014-10-30 20:25:49 -0600299 struct udevice *dev;
300
301 plat = calloc(1, sizeof(*plat));
302 if (!plat)
303 return -ENOMEM;
304 plat->regs = &ctlr->gpio_bank[bank];
Stephen Warrenb56989e2016-05-11 15:26:25 -0600305 plat->bank_name = gpio_bank_name(soc_data->start + bank);
Simon Glass78304532014-10-30 20:25:49 -0600306 plat->gpio_count = SUNXI_GPIOS_PER_BANK;
307
Simon Glass6996c662020-11-28 17:50:03 -0700308 ret = device_bind(parent, parent->driver, plat->bank_name, plat,
Simon Glass9030b392020-11-28 17:50:04 -0700309 dev_ofnode(parent), &dev);
Simon Glass78304532014-10-30 20:25:49 -0600310 if (ret)
311 return ret;
Simon Glass78304532014-10-30 20:25:49 -0600312 }
313
314 return 0;
315}
316
Stephen Warrenb56989e2016-05-11 15:26:25 -0600317static const struct sunxi_gpio_soc_data soc_data_a_all = {
318 .start = 0,
319 .no_banks = SUNXI_GPIO_BANKS,
320};
321
322static const struct sunxi_gpio_soc_data soc_data_l_1 = {
323 .start = 'L' - 'A',
324 .no_banks = 1,
325};
326
327static const struct sunxi_gpio_soc_data soc_data_l_2 = {
328 .start = 'L' - 'A',
329 .no_banks = 2,
330};
331
332static const struct sunxi_gpio_soc_data soc_data_l_3 = {
333 .start = 'L' - 'A',
334 .no_banks = 3,
335};
336
337#define ID(_compat_, _soc_data_) \
338 { .compatible = _compat_, .data = (ulong)&soc_data_##_soc_data_ }
339
Simon Glass78304532014-10-30 20:25:49 -0600340static const struct udevice_id sunxi_gpio_ids[] = {
Stephen Warrenb56989e2016-05-11 15:26:25 -0600341 ID("allwinner,sun4i-a10-pinctrl", a_all),
342 ID("allwinner,sun5i-a10s-pinctrl", a_all),
343 ID("allwinner,sun5i-a13-pinctrl", a_all),
Chris Blakee3b0a652018-01-15 16:28:18 -0600344 ID("allwinner,sun50i-h5-pinctrl", a_all),
Stephen Warrenb56989e2016-05-11 15:26:25 -0600345 ID("allwinner,sun6i-a31-pinctrl", a_all),
346 ID("allwinner,sun6i-a31s-pinctrl", a_all),
347 ID("allwinner,sun7i-a20-pinctrl", a_all),
348 ID("allwinner,sun8i-a23-pinctrl", a_all),
349 ID("allwinner,sun8i-a33-pinctrl", a_all),
350 ID("allwinner,sun8i-a83t-pinctrl", a_all),
351 ID("allwinner,sun8i-h3-pinctrl", a_all),
Chen-Yu Tsaic9d97742016-11-30 17:23:52 +0800352 ID("allwinner,sun8i-r40-pinctrl", a_all),
Icenowy Zheng5e92e972020-10-26 22:18:01 +0800353 ID("allwinner,sun8i-v3-pinctrl", a_all),
Andre Przywara4088d822018-04-04 01:31:14 +0100354 ID("allwinner,sun8i-v3s-pinctrl", a_all),
Stephen Warrenb56989e2016-05-11 15:26:25 -0600355 ID("allwinner,sun9i-a80-pinctrl", a_all),
Andre Przywara4088d822018-04-04 01:31:14 +0100356 ID("allwinner,sun50i-a64-pinctrl", a_all),
Andre Przywara60c84172019-06-23 15:09:47 +0100357 ID("allwinner,sun50i-h6-pinctrl", a_all),
Jernej Skrabec91dd2152021-01-11 21:11:51 +0100358 ID("allwinner,sun50i-h616-pinctrl", a_all),
Stephen Warrenb56989e2016-05-11 15:26:25 -0600359 ID("allwinner,sun6i-a31-r-pinctrl", l_2),
360 ID("allwinner,sun8i-a23-r-pinctrl", l_1),
361 ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
362 ID("allwinner,sun8i-h3-r-pinctrl", l_1),
363 ID("allwinner,sun9i-a80-r-pinctrl", l_3),
Andre Przywara4088d822018-04-04 01:31:14 +0100364 ID("allwinner,sun50i-a64-r-pinctrl", l_1),
Andre Przywara60c84172019-06-23 15:09:47 +0100365 ID("allwinner,sun50i-h6-r-pinctrl", l_2),
Jernej Skrabec91dd2152021-01-11 21:11:51 +0100366 ID("allwinner,sun50i-h616-r-pinctrl", l_1),
Simon Glass78304532014-10-30 20:25:49 -0600367 { }
368};
369
370U_BOOT_DRIVER(gpio_sunxi) = {
371 .name = "gpio_sunxi",
372 .id = UCLASS_GPIO,
373 .ops = &gpio_sunxi_ops,
374 .of_match = sunxi_gpio_ids,
375 .bind = gpio_sunxi_bind,
376 .probe = gpio_sunxi_probe,
377};
Simon Glassfa4689a2019-12-06 21:41:35 -0700378#endif /* DM_GPIO */