Lokesh Vutla | 8bfaf01 | 2018-08-27 15:59:08 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "k3-am654.dtsi" |
Faiz Abbas | d8fb309 | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 9 | #include <dt-bindings/pinctrl/k3.h> |
Lokesh Vutla | 8bfaf01 | 2018-08-27 15:59:08 +0530 | [diff] [blame] | 10 | |
| 11 | / { |
| 12 | compatible = "ti,am654-evm", "ti,am654"; |
| 13 | model = "Texas Instruments AM654 Base Board"; |
| 14 | |
| 15 | chosen { |
| 16 | stdout-path = "serial2:115200n8"; |
| 17 | bootargs = "earlycon=ns16550a,mmio32,0x02800000"; |
| 18 | }; |
| 19 | |
Suman Anna | 34721e5 | 2019-09-04 16:01:41 +0530 | [diff] [blame] | 20 | aliases { |
| 21 | remoteproc0 = &mcu_r5fss0_core0; |
| 22 | remoteproc1 = &mcu_r5fss0_core1; |
| 23 | }; |
| 24 | |
Lokesh Vutla | 8bfaf01 | 2018-08-27 15:59:08 +0530 | [diff] [blame] | 25 | memory@80000000 { |
| 26 | device_type = "memory"; |
| 27 | /* 4G RAM */ |
| 28 | reg = <0x00000000 0x80000000 0x00000000 0x80000000>, |
| 29 | <0x00000008 0x80000000 0x00000000 0x80000000>; |
| 30 | }; |
| 31 | |
| 32 | reserved-memory { |
| 33 | #address-cells = <2>; |
| 34 | #size-cells = <2>; |
| 35 | ranges; |
| 36 | secure_ddr: secure_ddr@9e800000 { |
| 37 | reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ |
| 38 | alignment = <0x1000>; |
| 39 | no-map; |
| 40 | }; |
| 41 | }; |
| 42 | }; |
Faiz Abbas | d8fb309 | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 43 | |
| 44 | &main_pmx0 { |
| 45 | main_mmc0_pins_default: main_mmc0_pins_default { |
| 46 | pinctrl-single,pins = < |
| 47 | AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ |
| 48 | AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ |
| 49 | AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ |
| 50 | AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ |
| 51 | AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ |
| 52 | AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ |
| 53 | AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ |
| 54 | AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ |
| 55 | AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ |
| 56 | AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ |
| 57 | AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ |
| 58 | AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ |
| 59 | >; |
| 60 | }; |
Vignesh Raghavendra | 5bbcabb | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 61 | |
Faiz Abbas | 43f6920 | 2021-02-04 15:10:56 +0530 | [diff] [blame^] | 62 | main_mmc1_pins_default: main_mmc1_pins_default { |
| 63 | pinctrl-single,pins = < |
| 64 | AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ |
| 65 | AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ |
| 66 | AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */ |
| 67 | AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */ |
| 68 | AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */ |
| 69 | AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */ |
| 70 | AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ |
| 71 | AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ |
| 72 | >; |
| 73 | }; |
| 74 | |
Vignesh Raghavendra | 5bbcabb | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 75 | usb1_pins_default: usb1_pins_default { |
| 76 | pinctrl-single,pins = < |
| 77 | AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ |
| 78 | >; |
| 79 | }; |
Vignesh Raghavendra | c7523c9 | 2020-02-17 13:22:55 +0530 | [diff] [blame] | 80 | |
| 81 | main_i2c2_pins_default: main-i2c2-pins-default { |
| 82 | pinctrl-single,pins = < |
| 83 | AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ |
| 84 | AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ |
| 85 | >; |
| 86 | }; |
Faiz Abbas | d8fb309 | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 87 | }; |
| 88 | |
Vignesh Raghavendra | c7523c9 | 2020-02-17 13:22:55 +0530 | [diff] [blame] | 89 | &main_pmx1 { |
| 90 | main_i2c0_pins_default: main-i2c0-pins-default { |
| 91 | pinctrl-single,pins = < |
| 92 | AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ |
| 93 | AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ |
| 94 | >; |
| 95 | }; |
| 96 | |
| 97 | main_i2c1_pins_default: main-i2c1-pins-default { |
| 98 | pinctrl-single,pins = < |
| 99 | AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ |
| 100 | AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ |
| 101 | >; |
| 102 | }; |
| 103 | }; |
| 104 | |
Andreas Dannenberg | d20cf7b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 105 | &wkup_pmx0 { |
| 106 | wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
| 107 | pinctrl-single,pins = < |
| 108 | AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ |
| 109 | AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ |
| 110 | >; |
| 111 | }; |
Vignesh Raghavendra | 1ee7955 | 2020-02-04 11:09:51 +0530 | [diff] [blame] | 112 | |
| 113 | mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { |
| 114 | pinctrl-single,pins = < |
| 115 | AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ |
| 116 | AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ |
| 117 | AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ |
| 118 | AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ |
| 119 | AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ |
| 120 | AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ |
| 121 | AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ |
| 122 | AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ |
| 123 | AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ |
| 124 | AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ |
| 125 | AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ |
| 126 | >; |
| 127 | }; |
Andreas Dannenberg | d20cf7b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 128 | }; |
| 129 | |
Faiz Abbas | d8fb309 | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 130 | &sdhci0 { |
| 131 | pinctrl-names = "default"; |
| 132 | pinctrl-0 = <&main_mmc0_pins_default>; |
| 133 | bus-width = <8>; |
| 134 | non-removable; |
| 135 | ti,driver-strength-ohm = <50>; |
| 136 | }; |
Andreas Dannenberg | d20cf7b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 137 | |
Faiz Abbas | 43f6920 | 2021-02-04 15:10:56 +0530 | [diff] [blame^] | 138 | /* |
| 139 | * Because of erratas i2025 and i2026 for silicon revision 1.0, the |
| 140 | * SD card interface might fail. Boards with sr1.0 are recommended to |
| 141 | * disable sdhci1 |
| 142 | */ |
| 143 | &sdhci1 { |
| 144 | pinctrl-names = "default"; |
| 145 | pinctrl-0 = <&main_mmc1_pins_default>; |
| 146 | ti,driver-strength-ohm = <50>; |
| 147 | disable-wp; |
| 148 | }; |
| 149 | |
Andreas Dannenberg | d20cf7b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 150 | &wkup_i2c0 { |
| 151 | pinctrl-names = "default"; |
| 152 | pinctrl-0 = <&wkup_i2c0_pins_default>; |
| 153 | clock-frequency = <400000>; |
Andreas Dannenberg | 67bb387 | 2019-06-04 18:08:18 -0500 | [diff] [blame] | 154 | |
| 155 | tca9554: gpio@38 { |
| 156 | compatible = "nxp,pca9554"; |
| 157 | reg = <0x38>; |
| 158 | gpio-controller; |
| 159 | #gpio-cells = <2>; |
| 160 | }; |
Andreas Dannenberg | d20cf7b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 161 | }; |
Vignesh Raghavendra | 5bbcabb | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 162 | |
Vignesh Raghavendra | c7523c9 | 2020-02-17 13:22:55 +0530 | [diff] [blame] | 163 | &main_i2c0 { |
| 164 | pinctrl-names = "default"; |
| 165 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 166 | clock-frequency = <400000>; |
| 167 | |
| 168 | pca9555: gpio@21 { |
| 169 | compatible = "nxp,pca9555"; |
| 170 | reg = <0x21>; |
| 171 | gpio-controller; |
| 172 | #gpio-cells = <2>; |
| 173 | }; |
| 174 | }; |
| 175 | |
| 176 | &main_i2c1 { |
| 177 | pinctrl-names = "default"; |
| 178 | pinctrl-0 = <&main_i2c1_pins_default>; |
| 179 | clock-frequency = <400000>; |
| 180 | }; |
| 181 | |
| 182 | &main_i2c2 { |
| 183 | pinctrl-names = "default"; |
| 184 | pinctrl-0 = <&main_i2c2_pins_default>; |
| 185 | clock-frequency = <400000>; |
| 186 | }; |
| 187 | |
Vignesh Raghavendra | 5bbcabb | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 188 | &dwc3_1 { |
| 189 | status = "okay"; |
| 190 | }; |
| 191 | |
| 192 | &usb1_phy { |
| 193 | status = "okay"; |
| 194 | }; |
| 195 | |
| 196 | &usb1 { |
| 197 | pinctrl-names = "default"; |
| 198 | pinctrl-0 = <&usb1_pins_default>; |
| 199 | dr_mode = "otg"; |
| 200 | }; |
| 201 | |
| 202 | &dwc3_0 { |
| 203 | status = "disabled"; |
| 204 | }; |
| 205 | |
| 206 | &usb0_phy { |
| 207 | status = "disabled"; |
| 208 | }; |
Vignesh Raghavendra | 1ee7955 | 2020-02-04 11:09:51 +0530 | [diff] [blame] | 209 | |
| 210 | &ospi0 { |
| 211 | pinctrl-names = "default"; |
| 212 | pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; |
| 213 | |
| 214 | flash@0{ |
| 215 | compatible = "jedec,spi-nor"; |
| 216 | reg = <0x0>; |
| 217 | spi-tx-bus-width = <1>; |
| 218 | spi-rx-bus-width = <8>; |
Vignesh Raghavendra | 032a855 | 2020-04-02 18:59:12 +0530 | [diff] [blame] | 219 | spi-max-frequency = <50000000>; |
Vignesh Raghavendra | 1ee7955 | 2020-02-04 11:09:51 +0530 | [diff] [blame] | 220 | cdns,tshsl-ns = <60>; |
| 221 | cdns,tsd2d-ns = <60>; |
| 222 | cdns,tchsh-ns = <60>; |
| 223 | cdns,tslch-ns = <60>; |
| 224 | cdns,read-delay = <0>; |
| 225 | #address-cells = <1>; |
| 226 | #size-cells = <1>; |
| 227 | }; |
| 228 | }; |