blob: a81b1061df9ff4e9a5a585b32c8f55c37ece659c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk0157ced2002-10-21 17:04:47 +00002/*
Wolfgang Denkf710efd2010-07-24 20:22:02 +02003 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +00004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk0157ced2002-10-21 17:04:47 +00005 */
6
7#ifndef __ASM_GBL_DATA_H
8#define __ASM_GBL_DATA_H
Simon Glass3ac47d72012-12-13 20:48:30 +00009
10/* Architecture-specific global data */
11struct arch_global_data {
Simon Glass9e247d12012-12-13 20:49:05 +000012#if defined(CONFIG_FSL_ESDHC)
13 u32 sdhc_clk;
14#endif
Zhao Qiang5ad93952014-09-25 13:52:25 +080015
16#if defined(CONFIG_U_QE)
17 u32 qe_clk;
18 u32 brg_clk;
19 uint mp_alloc_base;
20 uint mp_alloc_top;
21#endif /* CONFIG_U_QE */
22
Simon Glasse61accc2012-12-13 20:48:31 +000023#ifdef CONFIG_AT91FAMILY
24 /* "static data" needed by at91's clock.c */
25 unsigned long cpu_clk_rate_hz;
26 unsigned long main_clk_rate_hz;
27 unsigned long mck_rate_hz;
28 unsigned long plla_rate_hz;
29 unsigned long pllb_rate_hz;
30 unsigned long at91_pllb_usb_init;
31#endif
Simon Glass6ed6e032012-12-13 20:48:32 +000032 /* "static data" needed by most of timer.c on ARM platforms */
33 unsigned long timer_rate_hz;
Peng Fanf2d397b2017-05-09 10:32:02 +080034 unsigned int tbu;
35 unsigned int tbl;
Simon Glassa848da52012-12-13 20:48:35 +000036 unsigned long lastinc;
Simon Glass9cbe003a2012-12-13 20:48:36 +000037 unsigned long long timer_reset_value;
Trevor Woerner43ec7e02019-05-03 09:41:00 -040038#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
Simon Glass6b4ee152012-12-13 20:48:39 +000039 unsigned long tlb_addr;
Alexander Grafe317fe82016-03-04 01:09:47 +010040 unsigned long tlb_size;
Alexander Grafce0a64e2016-03-04 01:09:54 +010041#if defined(CONFIG_ARM64)
Alexander Grafe317fe82016-03-04 01:09:47 +010042 unsigned long tlb_fillptr;
43 unsigned long tlb_emerg;
Sergey Temerkhanov78eaa492015-10-14 09:55:45 -070044#endif
Simon Glass6b4ee152012-12-13 20:48:39 +000045#endif
York Sun1ef95cc2016-06-24 16:46:18 -070046#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
47#define MEM_RESERVE_SECURE_SECURED 0x1
48#define MEM_RESERVE_SECURE_MAINTAINED 0x2
49#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
50 /*
51 * Secure memory addr
52 * This variable needs maintenance if the RAM base is not zero,
53 * or if RAM splits into non-consecutive banks. It also has a
54 * flag indicating the secure memory is marked as secure by MMU.
55 * Flags used: 0x1 secured
56 * 0x2 maintained
57 */
58 phys_addr_t secure_ram;
York Sunf84f81e2016-06-24 16:46:19 -070059 unsigned long tlb_allocated;
York Sun1ef95cc2016-06-24 16:46:18 -070060#endif
York Sund6964b32017-03-06 09:02:24 -080061#ifdef CONFIG_RESV_RAM
62 /*
63 * Reserved RAM for memory resident, eg. Management Complex (MC)
64 * driver which continues to run after U-Boot exits.
65 */
66 phys_addr_t resv_ram;
67#endif
SRICHARAN R4af19882013-04-24 00:41:23 +000068
Masahiro Yamada6e1288c2017-04-25 13:10:11 +090069#ifdef CONFIG_ARCH_OMAP2PLUS
Paul Kocialkowskid5b76242015-07-15 16:02:19 +020070 u32 omap_boot_device;
71 u32 omap_boot_mode;
72 u8 omap_ch_flags;
SRICHARAN R4af19882013-04-24 00:41:23 +000073#endif
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +053074#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
York Sun1ecab782015-01-06 13:18:49 -080075 unsigned long mem2_clk;
76#endif
Peng Fanf17a0ce2018-10-18 14:28:10 +020077
78#ifdef CONFIG_ARCH_IMX8
79 struct udevice *scu_dev;
80#endif
Simon Glass3ac47d72012-12-13 20:48:30 +000081};
82
Simon Glass6878cd12012-12-13 20:49:14 +000083#include <asm-generic/global_data.h>
wdenk0157ced2002-10-21 17:04:47 +000084
Jeroen Hofstee43614d12014-07-30 21:54:52 +020085#ifdef __clang__
86
87#define DECLARE_GLOBAL_DATA_PTR
88#define gd get_gd()
89
90static inline gd_t *get_gd(void)
91{
92 gd_t *gd_ptr;
93
94#ifdef CONFIG_ARM64
95 /*
96 * Make will already error that reserving x18 is not supported at the
97 * time of writing, clang: error: unknown argument: '-ffixed-x18'
98 */
99 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
100#else
101 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
102#endif
103
104 return gd_ptr;
105}
106
107#else
108
David Feng85fd5f12013-12-14 11:47:35 +0800109#ifdef CONFIG_ARM64
110#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
111#else
112#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
113#endif
Jeroen Hofstee43614d12014-07-30 21:54:52 +0200114#endif
wdenk0157ced2002-10-21 17:04:47 +0000115
116#endif /* __ASM_GBL_DATA_H */