Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> |
| 3 | * |
| 4 | * (C) Copyright 2009 Freescale Semiconductor, Inc. |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #include <common.h> |
| 26 | #include <usb.h> |
| 27 | #include <asm/io.h> |
| 28 | #include <asm/arch/imx-regs.h> |
| 29 | #include <asm/arch/mx5x_pins.h> |
| 30 | #include <asm/arch/iomux.h> |
| 31 | #include <asm/gpio.h> |
| 32 | #include <usb/ehci-fsl.h> |
| 33 | #include <usb/ulpi.h> |
| 34 | #include <errno.h> |
| 35 | |
Matt Sealey | af8f53b | 2012-08-22 09:25:38 +0000 | [diff] [blame] | 36 | #include "../../../drivers/usb/host/ehci.h" |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 37 | |
| 38 | /* USB pin configuration */ |
| 39 | #define USB_PAD_CONFIG (PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \ |
| 40 | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \ |
| 41 | PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL) |
| 42 | |
| 43 | /* |
| 44 | * Configure the USB H1 and USB H2 IOMUX |
| 45 | */ |
| 46 | void setup_iomux_usb(void) |
| 47 | { |
| 48 | setup_iomux_usb_h1(); |
| 49 | |
| 50 | if (machine_is_efikasb()) |
| 51 | setup_iomux_usb_h2(); |
| 52 | |
| 53 | /* USB PHY reset */ |
| 54 | mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1); |
| 55 | mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE | |
| 56 | PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH); |
| 57 | |
| 58 | /* USB HUB reset */ |
| 59 | mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0); |
| 60 | mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE | |
| 61 | PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH); |
| 62 | |
| 63 | /* WIFI EN (act low) */ |
| 64 | mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO); |
| 65 | mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0); |
| 66 | /* WIFI RESET */ |
| 67 | mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO); |
| 68 | mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0); |
| 69 | /* BT EN (act low) */ |
| 70 | mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO); |
| 71 | mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0); |
| 72 | } |
| 73 | |
| 74 | /* |
| 75 | * Enable devices connected to USB BUSes |
| 76 | */ |
| 77 | static void efika_usb_enable_devices(void) |
| 78 | { |
| 79 | /* Enable Bluetooth */ |
| 80 | gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0); |
| 81 | udelay(10000); |
| 82 | gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1); |
| 83 | |
| 84 | /* Enable WiFi */ |
| 85 | gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1); |
| 86 | udelay(10000); |
| 87 | |
| 88 | /* Reset the WiFi chip */ |
| 89 | gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0); |
| 90 | udelay(10000); |
| 91 | gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1); |
| 92 | } |
| 93 | |
| 94 | /* |
| 95 | * Reset USB HUB (or HUBs on EfikaSB) |
| 96 | */ |
| 97 | static void efika_usb_hub_reset(void) |
| 98 | { |
| 99 | /* HUB reset */ |
| 100 | gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1); |
| 101 | udelay(1000); |
| 102 | gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0); |
| 103 | udelay(1000); |
| 104 | gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1); |
| 105 | } |
| 106 | |
| 107 | /* |
| 108 | * Reset USB PHY (or PHYs on EfikaSB) |
| 109 | */ |
| 110 | static void efika_usb_phy_reset(void) |
| 111 | { |
| 112 | /* SMSC 3317 PHY reset */ |
| 113 | gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0); |
| 114 | udelay(1000); |
| 115 | gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1); |
| 116 | } |
| 117 | |
| 118 | static void efika_ehci_init(struct usb_ehci *ehci, uint32_t stp_gpio, |
| 119 | uint32_t alt0, uint32_t alt1) |
| 120 | { |
| 121 | int ret; |
| 122 | struct ulpi_regs *ulpi = (struct ulpi_regs *)0; |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 123 | struct ulpi_viewport ulpi_vp; |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 124 | |
| 125 | mxc_request_iomux(stp_gpio, alt0); |
| 126 | mxc_iomux_set_pad(stp_gpio, PAD_CTL_DRV_HIGH | |
| 127 | PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); |
| 128 | gpio_direction_output(IOMUX_TO_GPIO(stp_gpio), 0); |
| 129 | udelay(1000); |
| 130 | gpio_set_value(IOMUX_TO_GPIO(stp_gpio), 1); |
| 131 | udelay(1000); |
| 132 | |
| 133 | mxc_request_iomux(stp_gpio, alt1); |
| 134 | mxc_iomux_set_pad(stp_gpio, USB_PAD_CONFIG); |
| 135 | udelay(10000); |
| 136 | |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 137 | ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint; |
| 138 | ulpi_vp.port_num = 0; |
| 139 | |
| 140 | ret = ulpi_init(&ulpi_vp); |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 141 | if (ret) { |
| 142 | printf("Efika USB ULPI initialization failed\n"); |
| 143 | return; |
| 144 | } |
| 145 | |
| 146 | /* ULPI set flags */ |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 147 | ulpi_write(&ulpi_vp, &ulpi->otg_ctrl, |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 148 | ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN | |
| 149 | ULPI_OTG_EXTVBUSIND); |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 150 | ulpi_write(&ulpi_vp, &ulpi->function_ctrl, |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 151 | ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL | |
| 152 | ULPI_FC_SUSPENDM); |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 153 | ulpi_write(&ulpi_vp, &ulpi->iface_ctrl, 0); |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 154 | |
| 155 | /* Set VBus */ |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 156 | ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set, |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 157 | ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); |
| 158 | |
| 159 | /* |
| 160 | * Set VBusChrg |
| 161 | * |
| 162 | * NOTE: This violates USB specification, but otherwise, USB on Efika |
| 163 | * doesn't work. |
| 164 | */ |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 165 | ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set, ULPI_OTG_CHRGVBUS); |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 166 | } |
| 167 | |
| 168 | int board_ehci_hcd_init(int port) |
| 169 | { |
| 170 | /* Init iMX51 EHCI */ |
| 171 | efika_usb_phy_reset(); |
| 172 | efika_usb_hub_reset(); |
| 173 | efika_usb_enable_devices(); |
| 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
| 178 | void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) |
| 179 | { |
| 180 | uint32_t port = OTG_BASE_ADDR + (0x200 * CONFIG_MXC_USB_PORT); |
| 181 | struct usb_ehci *ehci = (struct usb_ehci *)port; |
| 182 | struct ulpi_regs *ulpi = (struct ulpi_regs *)0; |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 183 | struct ulpi_viewport ulpi_vp; |
| 184 | |
| 185 | ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint; |
| 186 | ulpi_vp.port_num = 0; |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 187 | |
Govindraj.R | 6645d9e | 2012-02-06 03:55:31 +0000 | [diff] [blame] | 188 | ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set, ULPI_OTG_CHRGVBUS); |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 189 | |
Mike Frysinger | 60ce19a | 2012-03-05 13:47:00 +0000 | [diff] [blame] | 190 | mdelay(50); |
Marek Vasut | f2ebfeb | 2011-06-24 21:46:07 +0200 | [diff] [blame] | 191 | |
| 192 | /* terminate the reset */ |
| 193 | *reg = ehci_readl(status_reg); |
| 194 | *reg |= EHCI_PS_PE; |
| 195 | } |
| 196 | |
| 197 | void board_ehci_hcd_postinit(struct usb_ehci *ehci, int port) |
| 198 | { |
| 199 | uint32_t tmp; |
| 200 | |
| 201 | if (port == 0) { |
| 202 | /* Adjust UTMI PHY frequency to 24MHz */ |
| 203 | tmp = readl(OTG_BASE_ADDR + 0x80c); |
| 204 | tmp = (tmp & ~0x3) | 0x01; |
| 205 | writel(tmp, OTG_BASE_ADDR + 0x80c); |
| 206 | } else if (port == 1) { |
| 207 | efika_ehci_init(ehci, MX51_PIN_USBH1_STP, |
| 208 | IOMUX_CONFIG_ALT2, IOMUX_CONFIG_ALT0); |
| 209 | } else if ((port == 2) && machine_is_efikasb()) { |
| 210 | efika_ehci_init(ehci, MX51_PIN_EIM_A26, |
| 211 | IOMUX_CONFIG_ALT1, IOMUX_CONFIG_ALT2); |
| 212 | } |
| 213 | |
| 214 | if (port) |
| 215 | mdelay(10); |
| 216 | } |
Matt Sealey | c4ad2cb | 2012-08-23 04:52:33 +0000 | [diff] [blame] | 217 | |
| 218 | /* |
| 219 | * Ethernet on the Smarttop is on the USB bus. Rather than give an error about |
| 220 | * "CPU Net Initialization Failed", just pass this test since no other settings |
| 221 | * are required. Smartbook doesn't have built-in Ethernet but we will let it |
| 222 | * pass anyway considering someone may have plugged in a USB stick and all |
| 223 | * they need to do is run "usb start". |
| 224 | */ |
| 225 | int board_eth_init(bd_t *bis) |
| 226 | { |
| 227 | return 0; |
| 228 | } |