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git01.mediatek.com / filogic / uboot / 436337af308aebdae2f09c7bf49b6dcf70299fbc / . / arch / arm / dts / exynos5250-spring.dts
blob: b73b572e623eea3afad83955a66550096b6eeb5e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]2/*
3 * Google Spring board device tree source
4 *
5 * Copyright (c) 2013 Google, Inc
6 * Copyright (c) 2014 SUSE LINUX Products GmbH
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]7 */
8
9/dts-v1/;
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/input/input.h>
13#include "exynos5250.dtsi"
14
15/ {
16 model = "Google Spring";
17 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
18
19 aliases {
20 i2c0 = "/i2c@12C60000";
21 i2c1 = "/i2c@12C70000";
22 i2c2 = "/i2c@12C80000";
23 i2c3 = "/i2c@12C90000";
24 i2c4 = "/i2c@12CA0000";
25 i2c5 = "/i2c@12CB0000";
26 i2c6 = "/i2c@12CC0000";
27 i2c7 = "/i2c@12CD0000";
28 i2c104 = &cros_ec_ldo_tunnel;
29 spi0 = "/spi@12d20000";
30 spi1 = "/spi@12d30000";
31 spi2 = "/spi@12d40000";
32 spi3 = "/spi@131a0000";
33 spi4 = "/spi@131b0000";
34 mmc0 = "/mmc@12000000";
35 serial0 = "/serial@12C30000";
36 console = "/serial@12C30000";
37 i2s = "/sound@3830000";
38 };
39
40 memory {
41 reg = <0x40000000 0x80000000>;
42 };
43
44 flash@0 {
45 spl { /* spl size override */
46 size = <0x8000>;
47 };
48 };
49
50 chosen {
51 bootargs = "console=tty1";
52 stdout-path = "serial3:115200n8";
53 };
54
55 board-rev {
56 compatible = "google,board-revision";
57 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
58 <&gpy4 2 0>;
59 };
60
Simon Glass11328532015-08-22 18:31:37 -0600[diff] [blame]61 i2c@12C90000 {
62 clock-frequency = <100000>;
63 tpm@20 {
64 reg = <0x20>;
65 compatible = "infineon,slb9645tt";
66 };
67 };
68
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]69 mmc@12200000 {
70 samsung,bus-width = <8>;
71 samsung,timing = <1 3 3>;
72 samsung,removable = <0>;
73 };
74
75 mmc@12210000 {
76 status = "disabled";
77 };
78
79 mmc@12220000 {
80 /* MMC2 pins are used as GPIO for eDP bridge */
81 status = "disabled";
82 };
83
84 mmc@12230000 {
85 status = "disabled";
86 };
87
88 ehci@12110000 {
89 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
90 status = "okay";
91 };
92
93 xhci@12000000 {
94 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
95 };
96
97 spi@12d30000 {
98 spi-max-frequency = <50000000>;
99 firmware_storage_spi: flash@0 {
100 compatible = "spi-flash";
101 reg = <0>;
102 };
103 };
104
105 tmu@10060000 {
106 samsung,min-temp = <25>;
107 samsung,max-temp = <125>;
108 samsung,start-warning = <95>;
109 samsung,start-tripping = <105>;
110 samsung,hw-tripping = <110>;
111 samsung,efuse-min-value = <40>;
112 samsung,efuse-value = <55>;
113 samsung,efuse-max-value = <100>;
114 samsung,slope = <274761730>;
115 samsung,dc-value = <25>;
116 };
117
118 fimd@14400000 {
119 samsung,vl-freq = <60>;
120 samsung,vl-col = <1366>;
121 samsung,vl-row = <768>;
122 samsung,vl-width = <1366>;
123 samsung,vl-height = <768>;
124
125 samsung,vl-clkp;
126 samsung,vl-dp;
127 samsung,vl-hsp;
128 samsung,vl-vsp;
129
130 samsung,vl-bpix = <4>;
131
132 samsung,vl-hspw = <32>;
133 samsung,vl-hbpd = <80>;
134 samsung,vl-hfpd = <48>;
135 samsung,vl-vspw = <5>;
136 samsung,vl-vbpd = <14>;
137 samsung,vl-vfpd = <3>;
138 samsung,vl-cmd-allow-len = <0xf>;
139
140 samsung,winid = <0>;
141 samsung,interface-mode = <1>;
142 samsung,dp-enabled = <1>;
143 samsung,dual-lcd-enabled = <0>;
144 };
145
146 dp@145b0000 {
147 samsung,lt-status = <0>;
148
149 samsung,master-mode = <0>;
150 samsung,bist-mode = <0>;
151 samsung,bist-pattern = <0>;
152 samsung,h-sync-polarity = <0>;
153 samsung,v-sync-polarity = <0>;
154 samsung,interlaced = <0>;
155 samsung,color-space = <0>;
156 samsung,dynamic-range = <0>;
157 samsung,ycbcr-coeff = <0>;
158 samsung,color-depth = <1>;
159 };
Simon Glass67063672016-02-21 21:08:58 -0700[diff] [blame]160
161 backlight: backlight {
162 compatible = "pwm-backlight";
163 pwms = <&pwm 0 1000000 0>;
164 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
165 default-brightness-level = <1>;
166 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
167 power-supply = <&fet1>;
168 };
169
170 panel: panel {
171 compatible = "auo,b116xw03";
172 power-supply = <&fet6>;
173 backlight = <&backlight>;
174
175 port {
176 panel_in: endpoint {
177 remote-endpoint = <&bridge_out>;
178 };
179 };
180 };
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]181};
182
183&i2c_0 {
184 status = "okay";
185 samsung,i2c-sda-delay = <100>;
186 samsung,i2c-max-bus-freq = <378000>;
187
188 s5m8767-pmic@66 {
189 compatible = "samsung,s5m8767-pmic";
190 reg = <0x66>;
191 interrupt-parent = <&gpx3>;
192 wakeup-source;
193
194 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
195 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
196 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
197
198 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
199 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
200 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
201
202 /*
203 * The following arrays of DVS voltages are not used, since we are
204 * not using GPIOs to control PMIC bucks, but they must be defined
205 * to please the driver.
206 */
207 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
208 <1250000>, <1200000>,
209 <1150000>, <1100000>,
210 <1000000>, <950000>;
211
212 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
213 <1100000>, <1100000>,
214 <1000000>, <1000000>,
215 <1000000>, <1000000>;
216
217 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
218 <1200000>, <1200000>,
219 <1200000>, <1200000>,
220 <1200000>, <1200000>;
221
222 clocks {
223 compatible = "samsung,s5m8767-clk";
224 #clock-cells = <1>;
225 clock-output-names = "en32khz_ap",
226 "en32khz_cp",
227 "en32khz_bt";
228 };
229
230 regulators {
231 ldo4_reg: LDO4 {
232 regulator-name = "P1.0V_LDO_OUT4";
233 regulator-min-microvolt = <1000000>;
234 regulator-max-microvolt = <1000000>;
235 regulator-always-on;
236 op_mode = <0>;
237 };
238
239 ldo5_reg: LDO5 {
240 regulator-name = "P1.8V_LDO_OUT5";
241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <1800000>;
243 regulator-always-on;
244 op_mode = <0>;
245 };
246
247 ldo6_reg: LDO6 {
248 regulator-name = "vdd_mydp";
249 regulator-min-microvolt = <1200000>;
250 regulator-max-microvolt = <1200000>;
251 regulator-always-on;
252 op_mode = <3>;
253 };
254
255 ldo7_reg: LDO7 {
256 regulator-name = "P1.1V_LDO_OUT7";
257 regulator-min-microvolt = <1100000>;
258 regulator-max-microvolt = <1100000>;
259 regulator-always-on;
260 op_mode = <3>;
261 };
262
263 ldo8_reg: LDO8 {
264 regulator-name = "P1.0V_LDO_OUT8";
265 regulator-min-microvolt = <1000000>;
266 regulator-max-microvolt = <1000000>;
267 regulator-always-on;
268 op_mode = <3>;
269 };
270
271 ldo10_reg: LDO10 {
272 regulator-name = "P1.8V_LDO_OUT10";
273 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <1800000>;
275 regulator-always-on;
276 op_mode = <3>;
277 };
278
279 ldo11_reg: LDO11 {
280 regulator-name = "P1.8V_LDO_OUT11";
281 regulator-min-microvolt = <1800000>;
282 regulator-max-microvolt = <1800000>;
283 regulator-always-on;
284 op_mode = <0>;
285 };
286
287 ldo12_reg: LDO12 {
288 regulator-name = "P3.0V_LDO_OUT12";
289 regulator-min-microvolt = <3000000>;
290 regulator-max-microvolt = <3000000>;
291 regulator-always-on;
292 op_mode = <3>;
293 };
294
295 ldo13_reg: LDO13 {
296 regulator-name = "P1.8V_LDO_OUT13";
297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvolt = <1800000>;
299 regulator-always-on;
300 op_mode = <0>;
301 };
302
303 ldo14_reg: LDO14 {
304 regulator-name = "P1.8V_LDO_OUT14";
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-always-on;
308 op_mode = <3>;
309 };
310
311 ldo15_reg: LDO15 {
312 regulator-name = "P1.0V_LDO_OUT15";
313 regulator-min-microvolt = <1000000>;
314 regulator-max-microvolt = <1000000>;
315 regulator-always-on;
316 op_mode = <3>;
317 };
318
319 ldo16_reg: LDO16 {
320 regulator-name = "P1.8V_LDO_OUT16";
321 regulator-min-microvolt = <1800000>;
322 regulator-max-microvolt = <1800000>;
323 regulator-always-on;
324 op_mode = <3>;
325 };
326
327 ldo17_reg: LDO17 {
328 regulator-name = "P1.2V_LDO_OUT17";
329 regulator-min-microvolt = <1200000>;
330 regulator-max-microvolt = <1200000>;
331 regulator-always-on;
332 op_mode = <0>;
333 };
334
335 ldo25_reg: LDO25 {
336 regulator-name = "vdd_bridge";
337 regulator-min-microvolt = <1200000>;
338 regulator-max-microvolt = <1200000>;
339 regulator-always-on;
340 op_mode = <1>;
341 };
342
343 buck1_reg: BUCK1 {
344 regulator-name = "vdd_mif";
345 regulator-min-microvolt = <950000>;
346 regulator-max-microvolt = <1300000>;
347 regulator-always-on;
348 regulator-boot-on;
349 op_mode = <3>;
350 };
351
352 buck2_reg: BUCK2 {
353 regulator-name = "vdd_arm";
354 regulator-min-microvolt = <850000>;
355 regulator-max-microvolt = <1350000>;
356 regulator-always-on;
357 regulator-boot-on;
358 op_mode = <3>;
359 };
360
361 buck3_reg: BUCK3 {
362 regulator-name = "vdd_int";
363 regulator-min-microvolt = <900000>;
364 regulator-max-microvolt = <1200000>;
365 regulator-always-on;
366 regulator-boot-on;
367 op_mode = <3>;
368 };
369
370 buck4_reg: BUCK4 {
371 regulator-name = "vdd_g3d";
372 regulator-min-microvolt = <850000>;
373 regulator-max-microvolt = <1300000>;
374 regulator-boot-on;
375 op_mode = <3>;
376 };
377
378 buck5_reg: BUCK5 {
379 regulator-name = "P1.8V_BUCK_OUT5";
380 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>;
382 regulator-always-on;
383 regulator-boot-on;
384 op_mode = <1>;
385 };
386
387 buck6_reg: BUCK6 {
388 regulator-name = "P1.2V_BUCK_OUT6";
389 regulator-min-microvolt = <2050000>;
390 regulator-max-microvolt = <2050000>;
391 regulator-always-on;
392 regulator-boot-on;
393 op_mode = <0>;
394 };
395
396 buck9_reg: BUCK9 {
397 regulator-name = "vdd_ummc";
398 regulator-min-microvolt = <950000>;
399 regulator-max-microvolt = <3000000>;
400 regulator-always-on;
401 regulator-boot-on;
402 op_mode = <3>;
403 };
404 };
405 };
406};
407
Simon Glass67063672016-02-21 21:08:58 -0700[diff] [blame]408&dp {
409 status = "okay";
410 samsung,color-space = <0>;
411 samsung,dynamic-range = <0>;
412 samsung,ycbcr-coeff = <0>;
413 samsung,color-depth = <1>;
414 samsung,link-rate = <0x0a>;
415 samsung,lane-count = <1>;
416 samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
417
418 ports {
419 port@0 {
420 dp_out: endpoint {
421 remote-endpoint = <&bridge_in>;
422 };
423 };
424 };
425};
426
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]427&i2c_1 {
428 status = "okay";
429 samsung,i2c-sda-delay = <100>;
430 samsung,i2c-max-bus-freq = <378000>;
431};
432
433&i2c_2 {
434 status = "okay";
435 samsung,i2c-sda-delay = <100>;
436 samsung,i2c-max-bus-freq = <66000>;
437};
438
439&i2c_3 {
440 status = "okay";
441 samsung,i2c-sda-delay = <100>;
442 samsung,i2c-max-bus-freq = <66000>;
443};
444
445&i2c_4 {
446 status = "okay";
447 samsung,i2c-sda-delay = <100>;
448 samsung,i2c-max-bus-freq = <66000>;
449 clock-frequency = <66000>;
450
451 cros_ec: embedded-controller {
452 compatible = "google,cros-ec-i2c";
453 reg = <0x1e>;
454 interrupts = <6 IRQ_TYPE_NONE>;
455 interrupt-parent = <&gpx1>;
456 wakeup-source;
457 u-boot,i2c-offset-len = <0>;
458 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
459 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
460 compatible = "google,cros-ec-ldo-tunnel";
461 #address-cells = <1>;
462 #size-cells = <0>;
463 power-regulator {
464 compatible = "ti,tps65090";
465 reg = <0x48>;
466
467 regulators {
468 dcdc1 {
469 ti,enable-ext-control;
470 };
471 dcdc2 {
472 ti,enable-ext-control;
473 };
474 dcdc3 {
475 ti,enable-ext-control;
476 };
477 fet1: fet1 {
478 regulator-name = "vcd_led";
479 ti,overcurrent-wait = <3>;
480 };
481 tps65090_fet2: fet2 {
482 regulator-name = "video_mid";
483 regulator-always-on;
484 ti,overcurrent-wait = <3>;
485 };
486 fet3 {
487 regulator-name = "wwan_r";
488 regulator-always-on;
489 ti,overcurrent-wait = <3>;
490 };
491 fet4 {
492 regulator-name = "sdcard";
493 ti,overcurrent-wait = <3>;
494 };
495 fet5 {
496 regulator-name = "camout";
497 regulator-always-on;
498 ti,overcurrent-wait = <3>;
499 };
500 fet6: fet6 {
501 regulator-name = "lcd_vdd";
502 ti,overcurrent-wait = <3>;
503 };
504 tps65090_fet7: fet7 {
505 regulator-name = "video_mid_1a";
506 regulator-always-on;
507 ti,overcurrent-wait = <3>;
508 };
509 ldo1 {
510 };
511 ldo2 {
512 };
513 };
514 };
515 };
516 };
517};
518
519&i2c_5 {
520 status = "okay";
521 samsung,i2c-sda-delay = <100>;
522 samsung,i2c-max-bus-freq = <66000>;
523};
524
525&i2c_7 {
526 status = "okay";
527 samsung,i2c-sda-delay = <100>;
528 samsung,i2c-max-bus-freq = <66000>;
529
530 ps8622-bridge@8 {
531 compatible = "parade,ps8622";
532 reg = <0x8>;
533 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
534 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
535 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
536 power-supply = <&ldo6_reg>;
537 parade,regs = /bits/ 8 <
538 0x02 0xa1 0x01 /* HPD low */
539 /*
540 * SW setting: [1:0] SW output 1.2V voltage is
541 * lower to 96%
542 */
543 0x04 0x14 0x01
544 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
545 0x04 0xe3 0x20
546 0x04 0xe2 0x80 /* [7] RCO SS enable */
547 /*
548 * RPHY Setting: [3:2] CDR tune wait cycle before
549 * measure for fine tune b00: 1us,
550 * 01: 0.5us, 10:2us, 11:4us
551 */
552 0x04 0x8a 0x0c
553 0x04 0x89 0x08 /* [3] RFD always on */
554 /*
555 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
556 */
557 0x04 0x71 0x2d
558 /* 2.7G CDR settings */
559 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
560 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
561 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
562 /*
563 * 1.62G CDR settings:
564 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
565 */
566 0x04 0xc0 0x12
567 0x04 0xc1 0x92 /* Gitune=-37% */
568 0x04 0xc2 0x1c /* Fbstep=100% */
569 0x04 0x32 0x80 /* [7] LOS signal disable */
570 /* RPIO Setting */
571 /* [7:4] LVDS driver bias current 75% (250mV swing) */
572 0x04 0x00 0xb0
573 /* [7:6] Right-bar GPIO output strength is 8mA */
574 0x04 0x15 0x40
575 /* EQ Training State Machine Setting */
576 0x04 0x54 0x10 /* RCO calibration start */
577 /* [4:0] MAX_LANE_COUNT set to one lane */
578 0x01 0x02 0x81
579 /* [4:0] LANE_COUNT_SET set to one lane */
580 0x01 0x21 0x81
581 0x00 0x52 0x20
582 0x00 0xf1 0x03 /* HPD CP toggle enable */
583 0x00 0x62 0x41
584 /* Counter number add 1ms counter delay */
585 0x00 0xf6 0x01
586 /*
587 * [6]PWM function control by DPCD0040f[7], default
588 * is PWM block always works
589 */
590 0x00 0x77 0x06
591 0x00 0x4c 0x04
592 /*
593 * 04h Adjust VTotal tolerance to fix the 30Hz no-
594 * display issue
595 * DPCD00400='h00 Parade OUI = 'h001cf8
596 */
597 0x01 0xc0 0x00
598 0x01 0xc1 0x1c /* DPCD00401='h1c */
599 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
600 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
601 0x01 0xc3 0x44
602 0x01 0xc4 0x32 /* DPCD404 */
603 0x01 0xc5 0x53 /* DPCD405 */
604 0x01 0xc6 0x4c /* DPCD406 */
605 0x01 0xc7 0x56 /* DPCD407 */
606 0x01 0xc8 0x35 /* DPCD408 */
607 /* DPCD40A Initial Code major revision '01' */
608 0x01 0xca 0x01
609 /* DPCD40B Initial Code minor revision '05' */
610 0x01 0xcb 0x05
611 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
612 /*
613 * 0xff for 100% PWM of brightness, 0h for 0% brightness
614 */
615 0x01 0xa7 0x00
616 /*
617 * Set LVDS output as 6bit-VESA mapping, single LVDS
618 * channel
619 */
620 0x01 0xcc 0x13
621 0x02 0xb1 0x20 /* Enable SSC set by register */
622 /* Set SSC enabled and +/-1% central spreading */
623 0x04 0x10 0x16
624 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
625 0x04 0x54 0x14 /* LC -> RCO */
626 0x02 0xa1 0x91>; /* HPD high */
Simon Glass67063672016-02-21 21:08:58 -0700[diff] [blame]627 ports {
628 port@0 {
629 bridge_out: endpoint {
630 remote-endpoint = <&panel_in>;
631 };
632 };
633
634 port@1 {
635 bridge_in: endpoint {
636 remote-endpoint = <&dp_out>;
637 };
638 };
639 };
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]640 };
641
642 soundcodec@20 {
643 reg = <0x20>;
644 compatible = "maxim,max98088-codec";
645 };
646};
647
648#include "cros-ec-keyboard.dtsi"