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git01.mediatek.com / filogic / uboot / 435c190d43dc2b8e2d98bf1fed10ba77fa8546d5 / . / arch / arm / dts / tegra20-trimslice.dts
blob: fa942d2607880622c993de75fa5dbf190e2c547a [file] [log] [blame]
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrenf6236152013-02-21 12:31:27 +0000[diff] [blame]3#include "tegra20.dtsi"
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]4
5/ {
6 model = "Compulab TrimSlice board";
7 compatible = "compulab,trimslice", "nvidia,tegra20";
8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uarta;
11 };
12
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]13 aliases {
Stephen Warrene4ae2d42016-09-15 12:19:38 -0600[diff] [blame]14 usb0 = "/usb@c5000000";
Stephen Warrend55aadc2016-09-13 10:45:43 -0600[diff] [blame]15 mmc0 = "/sdhci@c8000600";
16 mmc1 = "/sdhci@c8000000";
Simon Glassb4381ee2014-10-13 23:42:12 -0600[diff] [blame]17 spi0 = "/spi@7000c380";
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]18 };
19
20 memory {
21 reg = <0x00000000 0x40000000>;
22 };
23
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]24 serial@70006000 {
25 clock-frequency = <216000000>;
26 };
27
Allen Martin523e4d62013-01-29 13:51:23 +0000[diff] [blame]28 spi@7000c380 {
29 status = "okay";
Tomasz Maciej Nowakefc86ff2023-03-30 20:24:22 +0200[diff] [blame]30 spi-max-frequency = <48000000>;
31
32 flash@0 {
33 compatible = "winbond,w25q80bl", "jedec,spi-nor";
34 reg = <0>;
35 spi-max-frequency = <48000000>;
36 };
Allen Martin523e4d62013-01-29 13:51:23 +0000[diff] [blame]37 };
38
Thierry Reding2afec172019-04-15 11:32:37 +0200[diff] [blame]39 pcie@80003000 {
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]40 status = "okay";
41
42 avdd-pex-supply = <&pci_vdd_reg>;
43 vdd-pex-supply = <&pci_vdd_reg>;
44 avdd-pex-pll-supply = <&pci_vdd_reg>;
45 avdd-plle-supply = <&pci_vdd_reg>;
46 vddio-pex-clk-supply = <&pci_clk_reg>;
47
48 pci@1,0 {
49 status = "okay";
50 };
51 };
52
Stephen Warren48edf192012-05-30 06:45:50 +0000[diff] [blame]53 usb@c5000000 {
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]54 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]55 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]56 };
57
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]58 sdhci@c8000000 {
59 status = "okay";
60 bus-width = <4>;
61 };
62
63 sdhci@c8000600 {
64 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]65 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
66 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]67 bus-width = <4>;
68 };
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]69
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]70 clocks {
71 compatible = "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <0>;
74
75 clk32k_in: clock@0 {
76 compatible = "fixed-clock";
77 reg=<0>;
78 #clock-cells = <0>;
79 clock-frequency = <32768>;
80 };
81 };
82
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]83 regulators {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <0>;
87
88 hdmi_vdd_reg: regulator@0 {
89 compatible = "regulator-fixed";
90 reg = <0>;
91 regulator-name = "avdd_hdmi";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 regulator-always-on;
95 };
96
97 hdmi_pll_reg: regulator@1 {
98 compatible = "regulator-fixed";
99 reg = <1>;
100 regulator-name = "avdd_hdmi_pll";
101 regulator-min-microvolt = <1800000>;
102 regulator-max-microvolt = <1800000>;
103 regulator-always-on;
104 };
105
106 vbus_reg: regulator@2 {
107 compatible = "regulator-fixed";
108 reg = <2>;
109 regulator-name = "usb1_vbus";
110 regulator-min-microvolt = <5000000>;
111 regulator-max-microvolt = <5000000>;
112 enable-active-high;
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]113 gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]114 regulator-always-on;
115 regulator-boot-on;
116 };
117
118 pci_clk_reg: regulator@3 {
119 compatible = "regulator-fixed";
120 reg = <3>;
121 regulator-name = "pci_clk";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
124 regulator-always-on;
125 };
126
127 pci_vdd_reg: regulator@4 {
128 compatible = "regulator-fixed";
129 reg = <4>;
130 regulator-name = "pci_vdd";
131 regulator-min-microvolt = <1050000>;
132 regulator-max-microvolt = <1050000>;
133 regulator-always-on;
134 };
135 };
136
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]137};
Simon Glass2a00cc92017-06-12 06:22:01 -0600[diff] [blame]138
139&uarta {
140 status = "okay";
141};