Andrew Davis | ebc98d9 | 2023-04-11 13:24:54 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 2 | /* |
Andrew Davis | ebc98d9 | 2023-04-11 13:24:54 -0500 | [diff] [blame] | 3 | * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * AM335x Starter Kit |
Nishanth Menon | eaa39c6 | 2023-11-01 15:56:03 -0500 | [diff] [blame] | 8 | * https://www.ti.com/tool/tmdssk3358 |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | #include "am33xx.dtsi" |
| 14 | #include <dt-bindings/pwm/pwm.h> |
| 15 | #include <dt-bindings/interrupt-controller/irq.h> |
| 16 | |
| 17 | / { |
| 18 | model = "TI AM335x EVM-SK"; |
| 19 | compatible = "ti,am335x-evmsk", "ti,am33xx"; |
| 20 | |
| 21 | chosen { |
| 22 | stdout-path = &uart0; |
| 23 | tick-timer = &timer2; |
| 24 | }; |
| 25 | |
| 26 | cpus { |
| 27 | cpu@0 { |
| 28 | cpu0-supply = <&vdd1_reg>; |
| 29 | }; |
| 30 | }; |
| 31 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 32 | memory@80000000 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 33 | device_type = "memory"; |
| 34 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
| 35 | }; |
| 36 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 37 | vbat: fixedregulator0 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 38 | compatible = "regulator-fixed"; |
| 39 | regulator-name = "vbat"; |
| 40 | regulator-min-microvolt = <5000000>; |
| 41 | regulator-max-microvolt = <5000000>; |
| 42 | regulator-boot-on; |
| 43 | }; |
| 44 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 45 | lis3_reg: fixedregulator1 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 46 | compatible = "regulator-fixed"; |
| 47 | regulator-name = "lis3_reg"; |
| 48 | regulator-boot-on; |
| 49 | }; |
| 50 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 51 | wl12xx_vmmc: fixedregulator2 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 52 | pinctrl-names = "default"; |
| 53 | pinctrl-0 = <&wl12xx_gpio>; |
| 54 | compatible = "regulator-fixed"; |
| 55 | regulator-name = "vwl1271"; |
| 56 | regulator-min-microvolt = <1800000>; |
| 57 | regulator-max-microvolt = <1800000>; |
| 58 | gpio = <&gpio1 29 0>; |
| 59 | startup-delay-us = <70000>; |
| 60 | enable-active-high; |
| 61 | }; |
| 62 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 63 | vtt_fixed: fixedregulator3 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 64 | compatible = "regulator-fixed"; |
| 65 | regulator-name = "vtt"; |
| 66 | regulator-min-microvolt = <1500000>; |
| 67 | regulator-max-microvolt = <1500000>; |
| 68 | gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>; |
| 69 | regulator-always-on; |
| 70 | regulator-boot-on; |
| 71 | enable-active-high; |
| 72 | }; |
| 73 | |
| 74 | leds { |
| 75 | pinctrl-names = "default"; |
| 76 | pinctrl-0 = <&user_leds_s0>; |
| 77 | |
| 78 | compatible = "gpio-leds"; |
| 79 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 80 | led1 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 81 | label = "evmsk:green:usr0"; |
| 82 | gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
| 83 | default-state = "off"; |
| 84 | }; |
| 85 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 86 | led2 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 87 | label = "evmsk:green:usr1"; |
| 88 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
| 89 | default-state = "off"; |
| 90 | }; |
| 91 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 92 | led3 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 93 | label = "evmsk:green:mmc0"; |
| 94 | gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
| 95 | linux,default-trigger = "mmc0"; |
| 96 | default-state = "off"; |
| 97 | }; |
| 98 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 99 | led4 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 100 | label = "evmsk:green:heartbeat"; |
| 101 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| 102 | linux,default-trigger = "heartbeat"; |
| 103 | default-state = "off"; |
| 104 | }; |
| 105 | }; |
| 106 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 107 | gpio_buttons: gpio_buttons0 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 108 | compatible = "gpio-keys"; |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 109 | #address-cells = <1>; |
| 110 | #size-cells = <0>; |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 111 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 112 | switch1 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 113 | label = "button0"; |
| 114 | linux,code = <0x100>; |
| 115 | gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
| 116 | }; |
| 117 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 118 | switch2 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 119 | label = "button1"; |
| 120 | linux,code = <0x101>; |
| 121 | gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
| 122 | }; |
| 123 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 124 | switch3 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 125 | label = "button2"; |
| 126 | linux,code = <0x102>; |
| 127 | gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; |
| 128 | wakeup-source; |
| 129 | }; |
| 130 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 131 | switch4 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 132 | label = "button3"; |
| 133 | linux,code = <0x103>; |
| 134 | gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
| 135 | }; |
| 136 | }; |
| 137 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 138 | lcd_bl: backlight { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 139 | compatible = "pwm-backlight"; |
| 140 | pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; |
| 141 | brightness-levels = <0 58 61 66 75 90 125 170 255>; |
| 142 | default-brightness-level = <8>; |
| 143 | }; |
| 144 | |
| 145 | sound { |
| 146 | compatible = "simple-audio-card"; |
| 147 | simple-audio-card,name = "AM335x-EVMSK"; |
| 148 | simple-audio-card,widgets = |
| 149 | "Headphone", "Headphone Jack"; |
| 150 | simple-audio-card,routing = |
| 151 | "Headphone Jack", "HPLOUT", |
| 152 | "Headphone Jack", "HPROUT"; |
| 153 | simple-audio-card,format = "dsp_b"; |
| 154 | simple-audio-card,bitclock-master = <&sound_master>; |
| 155 | simple-audio-card,frame-master = <&sound_master>; |
| 156 | simple-audio-card,bitclock-inversion; |
| 157 | |
| 158 | simple-audio-card,cpu { |
| 159 | sound-dai = <&mcasp1>; |
| 160 | }; |
| 161 | |
| 162 | sound_master: simple-audio-card,codec { |
| 163 | sound-dai = <&tlv320aic3106>; |
| 164 | system-clock-frequency = <24000000>; |
| 165 | }; |
| 166 | }; |
| 167 | |
| 168 | panel { |
| 169 | compatible = "ti,tilcdc,panel"; |
| 170 | pinctrl-names = "default", "sleep"; |
| 171 | pinctrl-0 = <&lcd_pins_default>; |
| 172 | pinctrl-1 = <&lcd_pins_sleep>; |
| 173 | status = "okay"; |
| 174 | panel-info { |
| 175 | ac-bias = <255>; |
| 176 | ac-bias-intrpt = <0>; |
| 177 | dma-burst-sz = <16>; |
| 178 | bpp = <32>; |
| 179 | fdd = <0x80>; |
| 180 | sync-edge = <0>; |
| 181 | sync-ctrl = <1>; |
| 182 | raster-order = <0>; |
| 183 | fifo-th = <0>; |
| 184 | }; |
| 185 | display-timings { |
| 186 | 480x272 { |
| 187 | hactive = <480>; |
| 188 | vactive = <272>; |
| 189 | hback-porch = <43>; |
| 190 | hfront-porch = <8>; |
| 191 | hsync-len = <4>; |
| 192 | vback-porch = <12>; |
| 193 | vfront-porch = <4>; |
| 194 | vsync-len = <10>; |
| 195 | clock-frequency = <9000000>; |
| 196 | hsync-active = <0>; |
| 197 | vsync-active = <0>; |
| 198 | }; |
| 199 | }; |
| 200 | }; |
| 201 | }; |
| 202 | |
| 203 | &am33xx_pinmux { |
| 204 | pinctrl-names = "default"; |
| 205 | pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; |
| 206 | |
| 207 | lcd_pins_default: lcd_pins_default { |
| 208 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 209 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad8.lcd_data23 */ |
| 210 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad9.lcd_data22 */ |
| 211 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad10.lcd_data21 */ |
| 212 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad11.lcd_data20 */ |
| 213 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad12.lcd_data19 */ |
| 214 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad13.lcd_data18 */ |
| 215 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad14.lcd_data17 */ |
| 216 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad15.lcd_data16 */ |
| 217 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) |
| 218 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) |
| 219 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) |
| 220 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) |
| 221 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) |
| 222 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) |
| 223 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) |
| 224 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) |
| 225 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) |
| 226 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) |
| 227 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) |
| 228 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) |
| 229 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) |
| 230 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) |
| 231 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) |
| 232 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) |
| 233 | AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) |
| 234 | AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) |
| 235 | AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) |
| 236 | AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 237 | >; |
| 238 | }; |
| 239 | |
| 240 | lcd_pins_sleep: lcd_pins_sleep { |
| 241 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 242 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 */ |
| 243 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad9.lcd_data22 */ |
| 244 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.lcd_data21 */ |
| 245 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.lcd_data20 */ |
| 246 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.lcd_data19 */ |
| 247 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.lcd_data18 */ |
| 248 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.lcd_data17 */ |
| 249 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.lcd_data16 */ |
| 250 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) |
| 251 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) |
| 252 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7) |
| 253 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7) |
| 254 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7) |
| 255 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7) |
| 256 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7) |
| 257 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7) |
| 258 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7) |
| 259 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7) |
| 260 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7) |
| 261 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7) |
| 262 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7) |
| 263 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7) |
| 264 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7) |
| 265 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7) |
| 266 | AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 267 | AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 268 | AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 269 | AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 270 | >; |
| 271 | }; |
| 272 | |
| 273 | |
| 274 | user_leds_s0: user_leds_s0 { |
| 275 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 276 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad4.gpio1_4 */ |
| 277 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad5.gpio1_5 */ |
| 278 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad6.gpio1_6 */ |
| 279 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad7.gpio1_7 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 280 | >; |
| 281 | }; |
| 282 | |
| 283 | gpio_keys_s0: gpio_keys_s0 { |
| 284 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 285 | AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ |
| 286 | AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ |
| 287 | AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_wait0.gpio0_30 */ |
| 288 | AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 289 | >; |
| 290 | }; |
| 291 | |
| 292 | i2c0_pins: pinmux_i2c0_pins { |
| 293 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 294 | AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) |
| 295 | AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 296 | >; |
| 297 | }; |
| 298 | |
| 299 | uart0_pins: pinmux_uart0_pins { |
| 300 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 301 | AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| 302 | AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 303 | >; |
| 304 | }; |
| 305 | |
| 306 | clkout2_pin: pinmux_clkout2_pin { |
| 307 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 308 | AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 309 | >; |
| 310 | }; |
| 311 | |
| 312 | ecap2_pins: backlight_pins { |
| 313 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 314 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, 0x0, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 315 | >; |
| 316 | }; |
| 317 | |
| 318 | cpsw_default: cpsw_default { |
| 319 | pinctrl-single,pins = < |
| 320 | /* Slave 1 */ |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 321 | AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
| 322 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
| 323 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ |
| 324 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ |
| 325 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
| 326 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
| 327 | AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ |
| 328 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ |
| 329 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ |
| 330 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ |
| 331 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
| 332 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 333 | |
| 334 | /* Slave 2 */ |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 335 | AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ |
| 336 | AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ |
| 337 | AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ |
| 338 | AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ |
| 339 | AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ |
| 340 | AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ |
| 341 | AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ |
| 342 | AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ |
| 343 | AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ |
| 344 | AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ |
| 345 | AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ |
| 346 | AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 347 | >; |
| 348 | }; |
| 349 | |
| 350 | cpsw_sleep: cpsw_sleep { |
| 351 | pinctrl-single,pins = < |
| 352 | /* Slave 1 reset value */ |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 353 | AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 354 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 355 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 356 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 357 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 358 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 359 | AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 360 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 361 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 362 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 363 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 364 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 365 | |
| 366 | /* Slave 2 reset value*/ |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 367 | AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 368 | AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 369 | AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 370 | AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 371 | AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 372 | AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 373 | AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 374 | AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 375 | AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 376 | AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 377 | AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 378 | AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 379 | >; |
| 380 | }; |
| 381 | |
| 382 | davinci_mdio_default: davinci_mdio_default { |
| 383 | pinctrl-single,pins = < |
| 384 | /* MDIO */ |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 385 | AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
| 386 | AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 387 | >; |
| 388 | }; |
| 389 | |
| 390 | davinci_mdio_sleep: davinci_mdio_sleep { |
| 391 | pinctrl-single,pins = < |
| 392 | /* MDIO reset value */ |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 393 | AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 394 | AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 395 | >; |
| 396 | }; |
| 397 | |
| 398 | mmc1_pins: pinmux_mmc1_pins { |
| 399 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 400 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 401 | >; |
| 402 | }; |
| 403 | |
| 404 | mcasp1_pins: mcasp1_pins { |
| 405 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 406 | AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ |
| 407 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ |
| 408 | AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* mii1_col.mcasp1_axr2 */ |
| 409 | AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 410 | >; |
| 411 | }; |
| 412 | |
| 413 | mcasp1_pins_sleep: mcasp1_pins_sleep { |
| 414 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 415 | AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 416 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 417 | AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 418 | AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 419 | >; |
| 420 | }; |
| 421 | |
| 422 | mmc2_pins: pinmux_mmc2_pins { |
| 423 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 424 | AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */ |
| 425 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
| 426 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ |
| 427 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ |
| 428 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ |
| 429 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ |
| 430 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 431 | >; |
| 432 | }; |
| 433 | |
| 434 | wl12xx_gpio: pinmux_wl12xx_gpio { |
| 435 | pinctrl-single,pins = < |
Andrew Davis | 7eeef8a | 2023-04-11 13:25:03 -0500 | [diff] [blame] | 436 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 */ |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 437 | >; |
| 438 | }; |
| 439 | }; |
| 440 | |
| 441 | &uart0 { |
| 442 | pinctrl-names = "default"; |
| 443 | pinctrl-0 = <&uart0_pins>; |
| 444 | |
| 445 | status = "okay"; |
| 446 | }; |
| 447 | |
| 448 | &i2c0 { |
| 449 | pinctrl-names = "default"; |
| 450 | pinctrl-0 = <&i2c0_pins>; |
| 451 | |
| 452 | status = "okay"; |
| 453 | clock-frequency = <400000>; |
| 454 | |
| 455 | tps: tps@2d { |
| 456 | reg = <0x2d>; |
| 457 | }; |
| 458 | |
| 459 | lis331dlh: lis331dlh@18 { |
| 460 | compatible = "st,lis331dlh", "st,lis3lv02d"; |
| 461 | reg = <0x18>; |
| 462 | Vdd-supply = <&lis3_reg>; |
| 463 | Vdd_IO-supply = <&lis3_reg>; |
| 464 | |
| 465 | st,click-single-x; |
| 466 | st,click-single-y; |
| 467 | st,click-single-z; |
| 468 | st,click-thresh-x = <10>; |
| 469 | st,click-thresh-y = <10>; |
| 470 | st,click-thresh-z = <10>; |
| 471 | st,irq1-click; |
| 472 | st,irq2-click; |
| 473 | st,wakeup-x-lo; |
| 474 | st,wakeup-x-hi; |
| 475 | st,wakeup-y-lo; |
| 476 | st,wakeup-y-hi; |
| 477 | st,wakeup-z-lo; |
| 478 | st,wakeup-z-hi; |
| 479 | st,min-limit-x = <120>; |
| 480 | st,min-limit-y = <120>; |
| 481 | st,min-limit-z = <140>; |
| 482 | st,max-limit-x = <550>; |
| 483 | st,max-limit-y = <550>; |
| 484 | st,max-limit-z = <750>; |
| 485 | }; |
| 486 | |
| 487 | tlv320aic3106: tlv320aic3106@1b { |
| 488 | #sound-dai-cells = <0>; |
| 489 | compatible = "ti,tlv320aic3106"; |
| 490 | reg = <0x1b>; |
| 491 | status = "okay"; |
| 492 | |
| 493 | /* Regulators */ |
| 494 | AVDD-supply = <&vaux2_reg>; |
| 495 | IOVDD-supply = <&vaux2_reg>; |
| 496 | DRVDD-supply = <&vaux2_reg>; |
| 497 | DVDD-supply = <&vbat>; |
| 498 | }; |
| 499 | }; |
| 500 | |
| 501 | &usb { |
| 502 | status = "okay"; |
| 503 | }; |
| 504 | |
| 505 | &usb_ctrl_mod { |
| 506 | status = "okay"; |
| 507 | }; |
| 508 | |
| 509 | &usb0_phy { |
| 510 | status = "okay"; |
| 511 | }; |
| 512 | |
| 513 | &usb1_phy { |
| 514 | status = "okay"; |
| 515 | }; |
| 516 | |
| 517 | &usb0 { |
| 518 | status = "okay"; |
| 519 | }; |
| 520 | |
| 521 | &usb1 { |
| 522 | status = "okay"; |
| 523 | dr_mode = "host"; |
| 524 | }; |
| 525 | |
| 526 | &cppi41dma { |
| 527 | status = "okay"; |
| 528 | }; |
| 529 | |
| 530 | &epwmss2 { |
| 531 | status = "okay"; |
| 532 | |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 533 | ecap2: pwm@100 { |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 534 | status = "okay"; |
| 535 | pinctrl-names = "default"; |
| 536 | pinctrl-0 = <&ecap2_pins>; |
| 537 | }; |
| 538 | }; |
| 539 | |
| 540 | #include "tps65910.dtsi" |
| 541 | |
| 542 | &tps { |
| 543 | vcc1-supply = <&vbat>; |
| 544 | vcc2-supply = <&vbat>; |
| 545 | vcc3-supply = <&vbat>; |
| 546 | vcc4-supply = <&vbat>; |
| 547 | vcc5-supply = <&vbat>; |
| 548 | vcc6-supply = <&vbat>; |
| 549 | vcc7-supply = <&vbat>; |
| 550 | vccio-supply = <&vbat>; |
| 551 | |
| 552 | regulators { |
| 553 | vrtc_reg: regulator@0 { |
| 554 | regulator-always-on; |
| 555 | }; |
| 556 | |
| 557 | vio_reg: regulator@1 { |
| 558 | regulator-always-on; |
| 559 | }; |
| 560 | |
| 561 | vdd1_reg: regulator@2 { |
| 562 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| 563 | regulator-name = "vdd_mpu"; |
| 564 | regulator-min-microvolt = <912500>; |
| 565 | regulator-max-microvolt = <1312500>; |
| 566 | regulator-boot-on; |
| 567 | regulator-always-on; |
| 568 | }; |
| 569 | |
| 570 | vdd2_reg: regulator@3 { |
| 571 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| 572 | regulator-name = "vdd_core"; |
| 573 | regulator-min-microvolt = <912500>; |
| 574 | regulator-max-microvolt = <1150000>; |
| 575 | regulator-boot-on; |
| 576 | regulator-always-on; |
| 577 | }; |
| 578 | |
| 579 | vdd3_reg: regulator@4 { |
| 580 | regulator-always-on; |
| 581 | }; |
| 582 | |
| 583 | vdig1_reg: regulator@5 { |
| 584 | regulator-always-on; |
| 585 | }; |
| 586 | |
| 587 | vdig2_reg: regulator@6 { |
| 588 | regulator-always-on; |
| 589 | }; |
| 590 | |
| 591 | vpll_reg: regulator@7 { |
| 592 | regulator-always-on; |
| 593 | }; |
| 594 | |
| 595 | vdac_reg: regulator@8 { |
| 596 | regulator-always-on; |
| 597 | }; |
| 598 | |
| 599 | vaux1_reg: regulator@9 { |
| 600 | regulator-always-on; |
| 601 | }; |
| 602 | |
| 603 | vaux2_reg: regulator@10 { |
| 604 | regulator-always-on; |
| 605 | }; |
| 606 | |
| 607 | vaux33_reg: regulator@11 { |
| 608 | regulator-always-on; |
| 609 | }; |
| 610 | |
| 611 | vmmc_reg: regulator@12 { |
| 612 | regulator-min-microvolt = <1800000>; |
| 613 | regulator-max-microvolt = <3300000>; |
| 614 | regulator-always-on; |
| 615 | }; |
| 616 | }; |
| 617 | }; |
| 618 | |
| 619 | &mac { |
| 620 | pinctrl-names = "default", "sleep"; |
| 621 | pinctrl-0 = <&cpsw_default>; |
| 622 | pinctrl-1 = <&cpsw_sleep>; |
| 623 | dual_emac = <1>; |
| 624 | status = "okay"; |
| 625 | }; |
| 626 | |
| 627 | &davinci_mdio { |
| 628 | pinctrl-names = "default", "sleep"; |
| 629 | pinctrl-0 = <&davinci_mdio_default>; |
| 630 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 631 | status = "okay"; |
Grygorii Strashko | a6f37dc | 2019-08-31 10:30:34 +0300 | [diff] [blame] | 632 | |
| 633 | ethphy0: ethernet-phy@0 { |
| 634 | reg = <0>; |
| 635 | }; |
| 636 | |
| 637 | ethphy1: ethernet-phy@1 { |
| 638 | reg = <1>; |
| 639 | }; |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 640 | }; |
| 641 | |
| 642 | &cpsw_emac0 { |
Grygorii Strashko | a6f37dc | 2019-08-31 10:30:34 +0300 | [diff] [blame] | 643 | phy-handle = <ðphy0>; |
| 644 | phy-mode = "rgmii-id"; |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 645 | dual_emac_res_vlan = <1>; |
| 646 | }; |
| 647 | |
| 648 | &cpsw_emac1 { |
Grygorii Strashko | a6f37dc | 2019-08-31 10:30:34 +0300 | [diff] [blame] | 649 | phy-handle = <ðphy1>; |
| 650 | phy-mode = "rgmii-id"; |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 651 | dual_emac_res_vlan = <2>; |
| 652 | }; |
| 653 | |
| 654 | &mmc1 { |
| 655 | status = "okay"; |
| 656 | vmmc-supply = <&vmmc_reg>; |
| 657 | bus-width = <4>; |
| 658 | pinctrl-names = "default"; |
| 659 | pinctrl-0 = <&mmc1_pins>; |
| 660 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
| 661 | }; |
| 662 | |
| 663 | &sham { |
| 664 | status = "okay"; |
| 665 | }; |
| 666 | |
| 667 | &aes { |
| 668 | status = "okay"; |
| 669 | }; |
| 670 | |
| 671 | &gpio0 { |
| 672 | ti,no-reset-on-init; |
| 673 | }; |
| 674 | |
| 675 | &mmc2 { |
| 676 | status = "okay"; |
| 677 | vmmc-supply = <&wl12xx_vmmc>; |
| 678 | ti,non-removable; |
| 679 | bus-width = <4>; |
| 680 | cap-power-off-card; |
| 681 | pinctrl-names = "default"; |
| 682 | pinctrl-0 = <&mmc2_pins>; |
| 683 | |
| 684 | #address-cells = <1>; |
| 685 | #size-cells = <0>; |
| 686 | wlcore: wlcore@2 { |
| 687 | compatible = "ti,wl1271"; |
| 688 | reg = <2>; |
| 689 | interrupt-parent = <&gpio0>; |
| 690 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */ |
| 691 | ref-clock-frequency = <38400000>; |
| 692 | }; |
| 693 | }; |
| 694 | |
| 695 | &mcasp1 { |
| 696 | #sound-dai-cells = <0>; |
| 697 | pinctrl-names = "default", "sleep"; |
| 698 | pinctrl-0 = <&mcasp1_pins>; |
| 699 | pinctrl-1 = <&mcasp1_pins_sleep>; |
| 700 | |
| 701 | status = "okay"; |
| 702 | |
| 703 | op-mode = <0>; /* MCASP_IIS_MODE */ |
| 704 | tdm-slots = <2>; |
| 705 | /* 4 serializers */ |
| 706 | serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 707 | 0 0 1 2 |
| 708 | >; |
| 709 | tx-num-evt = <32>; |
| 710 | rx-num-evt = <32>; |
| 711 | }; |
| 712 | |
| 713 | &tscadc { |
| 714 | status = "okay"; |
| 715 | tsc { |
| 716 | ti,wires = <4>; |
| 717 | ti,x-plate-resistance = <200>; |
| 718 | ti,coordinate-readouts = <5>; |
| 719 | ti,wire-config = <0x00 0x11 0x22 0x33>; |
| 720 | }; |
| 721 | }; |
| 722 | |
| 723 | &lcdc { |
Andrew Davis | a45320d | 2023-04-11 13:25:05 -0500 | [diff] [blame] | 724 | status = "okay"; |
Lokesh Vutla | 5a954ba | 2016-05-16 11:24:28 +0530 | [diff] [blame] | 725 | }; |
Dario Binacchi | 9565795 | 2021-06-02 22:38:03 +0200 | [diff] [blame] | 726 | |
| 727 | &rtc { |
| 728 | clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; |
| 729 | clock-names = "ext-clk", "int-clk"; |
| 730 | }; |