Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 434e024732484b1ece724b362b12045a3c628cc1 / . / configs / lion-rk3368_defconfig
blob: 9c29eb6fed3729e5091ed32cfd5da75e3ccc3af1 [file] [log] [blame]
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00200000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]7CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
8CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]9CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]10CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]11CONFIG_SPL_TEXT_BASE=0x00000000
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]12CONFIG_ROCKCHIP_RK3368=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]13CONFIG_TPL_LIBCOMMON_SUPPORT=y
14CONFIG_TPL_LIBGENERIC_SUPPORT=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]15CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]16CONFIG_SPL_STACK=0x188000
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]17CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]18CONFIG_DEBUG_UART_BASE=0xFF180000
19CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]20CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]21CONFIG_SPL_SPI=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]22CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]23CONFIG_DEBUG_UART=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]24CONFIG_FIT=y
25CONFIG_FIT_VERBOSE=y
26CONFIG_SPL_LOAD_FIT=y
Philipp Tomsichd422ba82017-09-11 22:04:27 +0200[diff] [blame]27CONFIG_BOOTSTAGE=y
28CONFIG_SPL_BOOTSTAGE=y
29CONFIG_BOOTSTAGE_REPORT=y
30CONFIG_BOOTSTAGE_FDT=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]31CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-lion-haikou.dtb"
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]32# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]33CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]34CONFIG_SPL_MAX_SIZE=0x40000
35CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]36CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
37CONFIG_SPL_BSS_START_ADDR=0x400000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]38CONFIG_SPL_BSS_MAX_SIZE=0x20000
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]39CONFIG_SPL_BOOTROM_SUPPORT=y
40# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]41# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]42CONFIG_SPL_STACK_R=y
Heiko Stuebner5cf783f2021-02-09 14:47:09 +0100[diff] [blame]43CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]44CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Philipp Tomsichaeb816e2017-09-13 21:29:43 +0200[diff] [blame]45CONFIG_SPL_ATF=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]46CONFIG_TPL=y
Tom Rini2c3c2822022-06-06 12:13:29 -0400[diff] [blame]47CONFIG_TPL_SYS_MALLOC_SIMPLE=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]48CONFIG_TPL_DRIVERS_MISC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]49CONFIG_CMD_GPIO=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]50CONFIG_CMD_MMC=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]51CONFIG_CMD_SPI=y
52CONFIG_CMD_USB=y
Philipp Tomsichd422ba82017-09-11 22:04:27 +0200[diff] [blame]53CONFIG_CMD_BOOTSTAGE=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]54CONFIG_CMD_REGULATOR=y
55CONFIG_CMD_MTDPARTS=y
56CONFIG_SPL_OF_CONTROL=y
57CONFIG_TPL_OF_CONTROL=y
Philipp Tomsichd422ba82017-09-11 22:04:27 +0200[diff] [blame]58CONFIG_OF_LIVE=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]59CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
60CONFIG_TPL_OF_PLATDATA=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]61CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]62CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]63CONFIG_NET_RANDOM_ETHADDR=y
64CONFIG_TPL_DM=y
65CONFIG_REGMAP=y
66CONFIG_SPL_REGMAP=y
67CONFIG_TPL_REGMAP=y
68CONFIG_SYSCON=y
69CONFIG_SPL_SYSCON=y
70CONFIG_TPL_SYSCON=y
71CONFIG_CLK=y
72CONFIG_SPL_CLK=y
73CONFIG_TPL_CLK=y
74CONFIG_ROCKCHIP_GPIO=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]75CONFIG_SYS_I2C_ROCKCHIP=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]76CONFIG_MMC_DW=y
77CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal8ece3042019-10-03 19:50:15 +0200[diff] [blame]78CONFIG_MTD=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]79CONFIG_SPI_FLASH_MACRONIX=y
80CONFIG_SPI_FLASH_WINBOND=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]81CONFIG_PHY_MSCC=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]82CONFIG_DM_ETH_PHY=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]83CONFIG_ETH_DESIGNWARE=y
84CONFIG_RGMII=y
85CONFIG_GMAC_ROCKCHIP=y
86CONFIG_PINCTRL=y
87CONFIG_SPL_PINCTRL=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]88CONFIG_DM_PMIC=y
89CONFIG_PMIC_RK8XX=y
90CONFIG_DM_REGULATOR_FIXED=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]91CONFIG_REGULATOR_RK8XX=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]92CONFIG_RAM=y
93CONFIG_SPL_RAM=y
94CONFIG_TPL_RAM=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]95CONFIG_DEBUG_UART_SHIFT=2
96CONFIG_DEBUG_UART_ANNOUNCE=y
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]97CONFIG_SYS_NS16550_MEM32=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]98CONFIG_ROCKCHIP_SPI=y
Tom Rini4c66e9a2020-11-09 14:23:01 -0500[diff] [blame]99CONFIG_SYSINFO=y
100CONFIG_SYSINFO_SMBIOS=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]101CONFIG_SYSRESET=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]102CONFIG_USB=y
103CONFIG_USB_EHCI_HCD=y
104CONFIG_USB_EHCI_GENERIC=y
105CONFIG_USB_DWC2=y
Heiko Stuebnerde188932021-02-09 14:47:10 +0100[diff] [blame]106CONFIG_USB_GADGET=y
107CONFIG_USB_GADGET_DWC2_OTG=y
Philipp Tomsich1620d352017-07-13 01:36:39 +0200[diff] [blame]108CONFIG_SPL_TINY_MEMSET=y
109CONFIG_LZO=y
110CONFIG_ERRNO_STR=y