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Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +09001/*
2 * Configuation settings for the Renesas Solutions AP-325RXA board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +09008 */
9
10#ifndef __AP325RXA_H
11#define __AP325RXA_H
12
13#undef DEBUG
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090014#define CONFIG_CPU_SH7723 1
15#define CONFIG_AP325RXA 1
16
17#define CONFIG_CMD_LOADB
18#define CONFIG_CMD_LOADS
19#define CONFIG_CMD_FLASH
20#define CONFIG_CMD_MEMORY
21#define CONFIG_CMD_NET
22#define CONFIG_CMD_PING
23#define CONFIG_CMD_NFS
24#define CONFIG_CMD_SDRAM
Mike Frysinger78dcaf42009-01-28 19:08:14 -050025#define CONFIG_CMD_SAVEENV
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090026#define CONFIG_CMD_IDE
27#define CONFIG_CMD_EXT2
28#define CONFIG_DOS_PARTITION
29
30#define CONFIG_BAUDRATE 38400
31#define CONFIG_BOOTDELAY 3
32#define CONFIG_BOOTARGS "console=ttySC2,38400"
33
34#define CONFIG_VERSION_VARIABLE
35#undef CONFIG_SHOW_BOOT_PROGRESS
36
37/* SMC9118 */
Ben Warrenfbfdd3a2009-07-20 22:01:11 -070038#define CONFIG_SMC911X 1
39#define CONFIG_SMC911X_32_BIT 1
40#define CONFIG_SMC911X_BASE 0xB6080000
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090041
42/* MEMORY */
43#define AP325RXA_SDRAM_BASE (0x88000000)
44#define AP325RXA_FLASH_BASE_1 (0xA0000000)
45#define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024)
46
Nobuhiro Iwamatsuf9386d52011-01-17 20:46:35 +090047#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
48
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090049/* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020050#define CONFIG_SYS_LONGHELP
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090051/* Monitor Command Prompt */
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090052/* Buffer size for input from the Console */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020053#define CONFIG_SYS_CBSIZE 256
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090054/* Buffer size for Console output */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020055#define CONFIG_SYS_PBSIZE 256
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090056/* max args accepted for monitor commands */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020057#define CONFIG_SYS_MAXARGS 16
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090058/* Buffer size for Boot Arguments passed to kernel */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020059#define CONFIG_SYS_BARGSIZE 512
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090060/* List of legal baudrate settings for this board */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020061#define CONFIG_SYS_BAUDRATE_TABLE { 38400 }
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090062
63/* SCIF */
64#define CONFIG_SCIF_CONSOLE 1
65#define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */
66#define CONFIG_CONS_SCIF5 1
67
68/* Suppress display of console information at boot */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020069#undef CONFIG_SYS_CONSOLE_INFO_QUIET
70#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
71#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090072
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE)
74#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090075
76/* Enable alternate, more extensive, memory test */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077#undef CONFIG_SYS_ALT_MEMTEST
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090078/* Scratch address used by the alternate memory test */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020079#undef CONFIG_SYS_MEMTEST_SCRATCH
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090080
81/* Enable temporary baudrate change while serial download */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#undef CONFIG_SYS_LOADS_BAUD_CHANGE
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090083
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020084#define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090085/* maybe more, but if so u-boot doesn't know about it... */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020086#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090087/* default load address for scripts ?!? */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020088#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090089
90/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020091#define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090092/* Monitor size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020093#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090094/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020095#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +090097
98/* FLASH */
99#define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200100#define CONFIG_SYS_FLASH_CFI
101#undef CONFIG_SYS_FLASH_QUIET_TEST
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900102/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200103#define CONFIG_SYS_FLASH_EMPTY_INFO
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900104/* Physical start address of Flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200105#define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900106/* Max number of sectors on each Flash chip */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200107#define CONFIG_SYS_MAX_FLASH_SECT 512
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900108
109/*
110 * IDE support
111 */
112#define CONFIG_IDE_RESET 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200113#define CONFIG_SYS_PIO_MODE 1
114#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
115#define CONFIG_SYS_IDE_MAXDEVICE 1
116#define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000
117#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
118#define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */
119#define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */
120#define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */
Albert Aribaud036c6b42010-08-08 05:17:05 +0530121#define CONFIG_IDE_SWAP_IO
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900122
123/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200124#define CONFIG_SYS_MAX_FLASH_BANKS 1
125#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)}
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900126
127/* Timeout for Flash erase operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200128#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900129/* Timeout for Flash write operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900131/* Timeout for Flash set sector lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900133/* Timeout for Flash clear lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200134#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900135
136/*
137 * Use hardware flash sectors protection instead
138 * of U-Boot software protection
139 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#undef CONFIG_SYS_FLASH_PROTECTION
141#undef CONFIG_SYS_DIRECT_FLASH_TFTP
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900142
143/* ENV setting */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200144#define CONFIG_ENV_IS_IN_FLASH
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900145#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200146#define CONFIG_ENV_SECT_SIZE (128 * 1024)
147#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200148#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
149/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
150#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200151#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900152
153/* Board Clock */
154#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +0900155#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
156#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARD32e6acc2009-06-04 12:06:48 +0200157#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
Nobuhiro Iwamatsu3e590432008-08-22 17:39:09 +0900158
159#endif /* __AP325RXA_H */