| Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <linux/io.h> |
| 9 | #include <mach/sbc-regs.h> |
| 10 | #include <mach/sg-regs.h> |
| 11 | |
| 12 | void sbc_init(void) |
| 13 | { |
| 14 | /* only address/data multiplex mode is supported */ |
| 15 | |
| 16 | /* XECS0 : boot/sub memory (boot swap = off/on) */ |
| 17 | writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL00); |
| 18 | writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL01); |
| 19 | writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL02); |
| 20 | |
| 21 | /* XECS1 : sub/boot memory (boot swap = off/on) */ |
| 22 | writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10); |
| 23 | writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11); |
| 24 | writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12); |
| 25 | |
| 26 | /* XECS2 : peripherals */ |
| 27 | writel(SBCTRL0_ADMULTIPLX_PERI_VALUE, SBCTRL20); |
| 28 | writel(SBCTRL1_ADMULTIPLX_PERI_VALUE, SBCTRL21); |
| 29 | writel(SBCTRL2_ADMULTIPLX_PERI_VALUE, SBCTRL22); |
| 30 | |
| 31 | /* base address regsiters */ |
| 32 | writel(0x0000bc01, SBBASE0); |
| 33 | writel(0x0400bc01, SBBASE1); |
| 34 | writel(0x0800bf01, SBBASE2); |
| 35 | |
| 36 | sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */ |
| 37 | } |