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wdenk2ebee312004-02-23 19:30:57 +00001/*
2 * Serial Port stuff - taken from Linux
3 *
4 * (C) Copyright 2002
5 * MAZeT GmbH <www.mazet.de>
6 * Stephan Linz <linz@mazet.de>, <linz@li-pro.net>
7 *
8 * (c) 2004
9 * IMMS gGmbH <www.imms.de>
10 * Thomas Elste <info@elste.org>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31#include <common.h>
wdenkf2140d52004-07-01 16:30:44 +000032#include <asm/hardware.h>
33
Wolfgang Denk6405a152006-03-31 18:32:53 +020034DECLARE_GLOBAL_DATA_PTR;
35
wdenk2ebee312004-02-23 19:30:57 +000036#define PORTA (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTA))
Wolfgang Denk3193a652005-10-09 01:41:48 +020037#if !defined(CONFIG_NETARM_NS7520)
wdenk2ebee312004-02-23 19:30:57 +000038#define PORTB (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTB))
Wolfgang Denk3193a652005-10-09 01:41:48 +020039#else
40#define PORTC (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTC))
41#endif
wdenk2ebee312004-02-23 19:30:57 +000042
43/* wait until transmitter is ready for another character */
Wolfgang Denka1be4762008-05-20 16:00:29 +020044#define TXWAITRDY(registers) \
wdenk2ebee312004-02-23 19:30:57 +000045{ \
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020046 ulong tmo = get_timer(0) + 1 * CONFIG_SYS_HZ; \
wdenk2ebee312004-02-23 19:30:57 +000047 while (((registers)->status_a & NETARM_SER_STATA_TX_RDY) == 0 ) { \
48 if (get_timer(0) > tmo) \
49 break; \
50 } \
51}
52
53
54volatile netarm_serial_channel_t *serial_reg_ch1 = get_serial_channel(0);
55volatile netarm_serial_channel_t *serial_reg_ch2 = get_serial_channel(1);
56
57extern void _netarm_led_FAIL1(void);
58
59/*
60 * Setup both serial i/f with given baudrate
61 */
62void serial_setbrg (void)
63{
wdenk2ebee312004-02-23 19:30:57 +000064 /* set 0 ... make sure pins are configured for serial */
Wolfgang Denk3193a652005-10-09 01:41:48 +020065#if !defined(CONFIG_NETARM_NS7520)
wdenk2ebee312004-02-23 19:30:57 +000066 PORTA = PORTB =
67 NETARM_GEN_PORT_MODE (0xef) | NETARM_GEN_PORT_DIR (0xe0);
Wolfgang Denk3193a652005-10-09 01:41:48 +020068#else
69 PORTA = NETARM_GEN_PORT_MODE (0xef) | NETARM_GEN_PORT_DIR (0xe0);
70 PORTC = NETARM_GEN_PORT_CSF (0xef) | NETARM_GEN_PORT_MODE (0xef) | NETARM_GEN_PORT_DIR (0xe0);
71#endif
wdenk2ebee312004-02-23 19:30:57 +000072
73 /* first turn em off */
74 serial_reg_ch1->ctrl_a = serial_reg_ch2->ctrl_a = 0;
75
76 /* clear match register, we don't need it */
77 serial_reg_ch1->rx_match = serial_reg_ch2->rx_match = 0;
78
79 /* setup bit rate generator and rx buffer gap timer (1 byte only) */
80 if ((gd->baudrate >= MIN_BAUD_RATE)
81 && (gd->baudrate <= MAX_BAUD_RATE)) {
82 serial_reg_ch1->bitrate = serial_reg_ch2->bitrate =
83 NETARM_SER_BR_X16 (gd->baudrate);
84 serial_reg_ch1->rx_buf_timer = serial_reg_ch2->rx_buf_timer =
85 0;
86 serial_reg_ch1->rx_char_timer = serial_reg_ch2->rx_char_timer =
87 NETARM_SER_RXGAP (gd->baudrate);
88 } else {
89 hang ();
90 }
91
92 /* setup port mode */
93 serial_reg_ch1->ctrl_b = serial_reg_ch2->ctrl_b =
94 ( NETARM_SER_CTLB_RCGT_EN |
95 NETARM_SER_CTLB_UART_MODE);
96 serial_reg_ch1->ctrl_a = serial_reg_ch2->ctrl_a =
97 ( NETARM_SER_CTLA_ENABLE |
98 NETARM_SER_CTLA_P_NONE |
99 /* see errata */
100 NETARM_SER_CTLA_2STOP |
101 NETARM_SER_CTLA_8BITS |
102 NETARM_SER_CTLA_DTR_EN |
103 NETARM_SER_CTLA_RTS_EN);
104}
105
106
107/*
108 * Initialise the serial port with the given baudrate. The settings
109 * are always 8 data bits, no parity, 1 stop bit, no start bits.
110 */
111int serial_init (void)
112{
113 serial_setbrg ();
114 return 0;
115}
116
117
118/*
119 * Output a single byte to the serial port.
120 */
121void serial_putc (const char c)
122{
123 volatile unsigned char *fifo;
124
125 /* If \n, also do \r */
126 if (c == '\n')
127 serial_putc ('\r');
128
129 fifo = (volatile unsigned char *) &(serial_reg_ch1->fifo);
130 TXWAITRDY (serial_reg_ch1);
131 *fifo = c;
132}
133
134/*
135 * Test of a single byte from the serial port. Returns 1 on success, 0
136 * otherwise.
137 */
138int serial_tstc(void)
139{
140 return serial_reg_ch1->status_a & NETARM_SER_STATA_RX_RDY;
141}
142
143/*
144 * Read a single byte from the serial port. Returns 1 on success, 0
145 * otherwise.
146 */
147int serial_getc (void)
148{
149 unsigned int ch_uint;
150 volatile unsigned int *fifo;
151 volatile unsigned char *fifo_char = NULL;
152 int buf_count = 0;
153
154 while (!(serial_reg_ch1->status_a & NETARM_SER_STATA_RX_RDY))
155 /* NOP */ ;
156
157 fifo = (volatile unsigned int *) &(serial_reg_ch1->fifo);
158 fifo_char = (unsigned char *) &ch_uint;
159 ch_uint = *fifo;
160
161 buf_count = NETARM_SER_STATA_RXFDB (serial_reg_ch1->status_a);
162 switch (buf_count) {
163 case NETARM_SER_STATA_RXFDB_4BYTES:
164 buf_count = 4;
165 break;
166 case NETARM_SER_STATA_RXFDB_3BYTES:
167 buf_count = 3;
168 break;
169 case NETARM_SER_STATA_RXFDB_2BYTES:
170 buf_count = 2;
171 break;
172 case NETARM_SER_STATA_RXFDB_1BYTES:
173 buf_count = 1;
174 break;
175 default:
176 /* panic, be never here */
wdenkce4832c2004-10-17 21:12:06 +0000177 break;
wdenk2ebee312004-02-23 19:30:57 +0000178 }
179
180 serial_reg_ch1->status_a |= NETARM_SER_STATA_RX_CLOSED;
181
182 return ch_uint & 0xff;
183}
184
185void serial_puts (const char *s)
186{
187 while (*s) {
188 serial_putc (*s++);
189 }
190}