Tom Rini | 844493d | 2025-01-26 16:17:47 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
| 2 | /* |
| 3 | * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved |
| 4 | * Copyright (c) 2024, Linaro Limited |
| 5 | */ |
| 6 | |
| 7 | #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SAR2130P_H |
| 8 | #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SAR2130P_H |
| 9 | |
| 10 | /* GPU_CC clocks */ |
| 11 | #define GPU_CC_AHB_CLK 0 |
| 12 | #define GPU_CC_CRC_AHB_CLK 1 |
| 13 | #define GPU_CC_CX_FF_CLK 2 |
| 14 | #define GPU_CC_CX_GMU_CLK 3 |
| 15 | #define GPU_CC_CXO_AON_CLK 4 |
| 16 | #define GPU_CC_CXO_CLK 5 |
| 17 | #define GPU_CC_FF_CLK_SRC 6 |
| 18 | #define GPU_CC_GMU_CLK_SRC 7 |
| 19 | #define GPU_CC_GX_GMU_CLK 8 |
| 20 | #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 9 |
| 21 | #define GPU_CC_HUB_AON_CLK 10 |
| 22 | #define GPU_CC_HUB_CLK_SRC 11 |
| 23 | #define GPU_CC_HUB_CX_INT_CLK 12 |
| 24 | #define GPU_CC_MEMNOC_GFX_CLK 13 |
| 25 | #define GPU_CC_PLL0 14 |
| 26 | #define GPU_CC_PLL1 15 |
| 27 | #define GPU_CC_SLEEP_CLK 16 |
| 28 | |
| 29 | /* GDSCs */ |
| 30 | #define GPU_GX_GDSC 0 |
| 31 | #define GPU_CX_GDSC 1 |
| 32 | |
| 33 | #endif |