| Tom Rini | 844493d | 2025-01-26 16:17:47 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ |
| 2 | #ifndef __DTS_MARVELL_PXA1908_CLOCK_H |
| 3 | #define __DTS_MARVELL_PXA1908_CLOCK_H |
| 4 | |
| 5 | /* plls */ |
| 6 | #define PXA1908_CLK_CLK32 1 |
| 7 | #define PXA1908_CLK_VCTCXO 2 |
| 8 | #define PXA1908_CLK_PLL1_624 3 |
| 9 | #define PXA1908_CLK_PLL1_416 4 |
| 10 | #define PXA1908_CLK_PLL1_499 5 |
| 11 | #define PXA1908_CLK_PLL1_832 6 |
| 12 | #define PXA1908_CLK_PLL1_1248 7 |
| 13 | #define PXA1908_CLK_PLL1_D2 8 |
| 14 | #define PXA1908_CLK_PLL1_D4 9 |
| 15 | #define PXA1908_CLK_PLL1_D8 10 |
| 16 | #define PXA1908_CLK_PLL1_D16 11 |
| 17 | #define PXA1908_CLK_PLL1_D6 12 |
| 18 | #define PXA1908_CLK_PLL1_D12 13 |
| 19 | #define PXA1908_CLK_PLL1_D24 14 |
| 20 | #define PXA1908_CLK_PLL1_D48 15 |
| 21 | #define PXA1908_CLK_PLL1_D96 16 |
| 22 | #define PXA1908_CLK_PLL1_D13 17 |
| 23 | #define PXA1908_CLK_PLL1_32 18 |
| 24 | #define PXA1908_CLK_PLL1_208 19 |
| 25 | #define PXA1908_CLK_PLL1_117 20 |
| 26 | #define PXA1908_CLK_PLL1_416_GATE 21 |
| 27 | #define PXA1908_CLK_PLL1_624_GATE 22 |
| 28 | #define PXA1908_CLK_PLL1_832_GATE 23 |
| 29 | #define PXA1908_CLK_PLL1_1248_GATE 24 |
| 30 | #define PXA1908_CLK_PLL1_D2_GATE 25 |
| 31 | #define PXA1908_CLK_PLL1_499_EN 26 |
| 32 | #define PXA1908_CLK_PLL2VCO 27 |
| 33 | #define PXA1908_CLK_PLL2 28 |
| 34 | #define PXA1908_CLK_PLL2P 29 |
| 35 | #define PXA1908_CLK_PLL2VCODIV3 30 |
| 36 | #define PXA1908_CLK_PLL3VCO 31 |
| 37 | #define PXA1908_CLK_PLL3 32 |
| 38 | #define PXA1908_CLK_PLL3P 33 |
| 39 | #define PXA1908_CLK_PLL3VCODIV3 34 |
| 40 | #define PXA1908_CLK_PLL4VCO 35 |
| 41 | #define PXA1908_CLK_PLL4 36 |
| 42 | #define PXA1908_CLK_PLL4P 37 |
| 43 | #define PXA1908_CLK_PLL4VCODIV3 38 |
| 44 | |
| 45 | /* apb (apbc) peripherals */ |
| 46 | #define PXA1908_CLK_UART0 1 |
| 47 | #define PXA1908_CLK_UART1 2 |
| 48 | #define PXA1908_CLK_GPIO 3 |
| 49 | #define PXA1908_CLK_PWM0 4 |
| 50 | #define PXA1908_CLK_PWM1 5 |
| 51 | #define PXA1908_CLK_PWM2 6 |
| 52 | #define PXA1908_CLK_PWM3 7 |
| 53 | #define PXA1908_CLK_SSP0 8 |
| 54 | #define PXA1908_CLK_SSP1 9 |
| 55 | #define PXA1908_CLK_IPC_RST 10 |
| 56 | #define PXA1908_CLK_RTC 11 |
| 57 | #define PXA1908_CLK_TWSI0 12 |
| 58 | #define PXA1908_CLK_KPC 13 |
| 59 | #define PXA1908_CLK_SWJTAG 14 |
| 60 | #define PXA1908_CLK_SSP2 15 |
| 61 | #define PXA1908_CLK_TWSI1 16 |
| 62 | #define PXA1908_CLK_THERMAL 17 |
| 63 | #define PXA1908_CLK_TWSI3 18 |
| 64 | |
| 65 | /* apb (apbcp) peripherals */ |
| 66 | #define PXA1908_CLK_UART2 1 |
| 67 | #define PXA1908_CLK_TWSI2 2 |
| 68 | #define PXA1908_CLK_AICER 3 |
| 69 | |
| 70 | /* axi (apmu) peripherals */ |
| 71 | #define PXA1908_CLK_CCIC1 1 |
| 72 | #define PXA1908_CLK_ISP 2 |
| 73 | #define PXA1908_CLK_DSI1 3 |
| 74 | #define PXA1908_CLK_DISP1 4 |
| 75 | #define PXA1908_CLK_CCIC0 5 |
| 76 | #define PXA1908_CLK_SDH0 6 |
| 77 | #define PXA1908_CLK_SDH1 7 |
| 78 | #define PXA1908_CLK_USB 8 |
| 79 | #define PXA1908_CLK_NF 9 |
| 80 | #define PXA1908_CLK_CORE_DEBUG 10 |
| 81 | #define PXA1908_CLK_VPU 11 |
| 82 | #define PXA1908_CLK_GC 12 |
| 83 | #define PXA1908_CLK_SDH2 13 |
| 84 | #define PXA1908_CLK_GC2D 14 |
| 85 | #define PXA1908_CLK_TRACE 15 |
| 86 | #define PXA1908_CLK_DVC_DFC_DEBUG 16 |
| 87 | |
| 88 | #endif |