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Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +09001/*
2 * SuperH SCIF device driver.
Nobuhiro Iwamatsu788b73f2013-07-23 13:58:20 +09003 * Copyright (C) 2013 Renesas Electronics Corporation
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +09004 * Copyright (C) 2007,2008,2010, 2014 Nobuhiro Iwamatsu
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +09005 * Copyright (C) 2002 - 2008 Paul Mundt
Wolfgang Denk0a5c2142007-12-27 01:52:50 +01006 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +09008 */
9
10#include <common.h>
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090011#include <errno.h>
Marek Vasut8fe2ffc2017-07-21 23:19:18 +020012#include <clk.h>
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090013#include <dm.h>
Jean-Christophe PLAGNIOL-VILLARDb27a8e32009-01-11 16:35:16 +010014#include <asm/io.h>
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090015#include <asm/processor.h>
Marek Vasut904d3d72012-09-14 22:40:08 +020016#include <serial.h>
17#include <linux/compiler.h>
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090018#include <dm/platform_data/serial_sh.h>
19#include "serial_sh.h"
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090020
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +090021DECLARE_GLOBAL_DATA_PTR;
22
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +090023#if defined(CONFIG_CPU_SH7760) || \
24 defined(CONFIG_CPU_SH7780) || \
25 defined(CONFIG_CPU_SH7785) || \
26 defined(CONFIG_CPU_SH7786)
27static int scif_rxfill(struct uart_port *port)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090028{
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +090029 return sci_in(port, SCRFDR) & 0xff;
30}
31#elif defined(CONFIG_CPU_SH7763)
32static int scif_rxfill(struct uart_port *port)
33{
34 if ((port->mapbase == 0xffe00000) ||
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090035 (port->mapbase == 0xffe08000)) {
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +090036 /* SCIF0/1*/
37 return sci_in(port, SCRFDR) & 0xff;
38 } else {
39 /* SCIF2 */
40 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
41 }
42}
43#elif defined(CONFIG_ARCH_SH7372)
44static int scif_rxfill(struct uart_port *port)
45{
46 if (port->type == PORT_SCIFA)
47 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
48 else
49 return sci_in(port, SCRFDR);
50}
Nobuhiro Iwamatsu1b36beb2008-03-06 14:05:53 +090051#else
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +090052static int scif_rxfill(struct uart_port *port)
53{
54 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
55}
Nobuhiro Iwamatsu1b36beb2008-03-06 14:05:53 +090056#endif
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +090057
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090058static void sh_serial_init_generic(struct uart_port *port)
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +090059{
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090060 sci_out(port, SCSCR , SCSCR_INIT(port));
61 sci_out(port, SCSCR , SCSCR_INIT(port));
62 sci_out(port, SCSMR, 0);
63 sci_out(port, SCSMR, 0);
64 sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
65 sci_in(port, SCFCR);
66 sci_out(port, SCFCR, 0);
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090067}
68
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090069static void
70sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate)
Tetsuyuki Kobayashi5d2b5a22012-11-19 21:37:38 +000071{
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090072 if (port->clk_mode == EXT_CLK) {
73 unsigned short dl = DL_VALUE(baudrate, clk);
74 sci_out(port, DL, dl);
Nobuhiro Iwamatsu17861752014-12-10 14:42:05 +090075 /* Need wait: Clock * 1/dl * 1/16 */
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090076 udelay((1000000 * dl * 16 / clk) * 1000 + 1);
77 } else {
78 sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk));
79 }
Tetsuyuki Kobayashi5d2b5a22012-11-19 21:37:38 +000080}
81
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090082static void handle_error(struct uart_port *port)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090083{
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090084 sci_in(port, SCxSR);
85 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
86 sci_in(port, SCLSR);
87 sci_out(port, SCLSR, 0x00);
88}
89
90static int serial_raw_putc(struct uart_port *port, const char c)
91{
92 /* Tx fifo is empty */
93 if (!(sci_in(port, SCxSR) & SCxSR_TEND(port)))
94 return -EAGAIN;
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090095
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +090096 sci_out(port, SCxTDR, c);
97 sci_out(port, SCxSR, sci_in(port, SCxSR) & ~SCxSR_TEND(port));
98
99 return 0;
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900100}
101
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900102static int serial_rx_fifo_level(struct uart_port *port)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900103{
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900104 return scif_rxfill(port);
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900105}
106
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900107static int sh_serial_tstc_generic(struct uart_port *port)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900108{
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900109 if (sci_in(port, SCxSR) & SCIF_ERRORS) {
110 handle_error(port);
Tetsuyuki Kobayashi5d2b5a22012-11-19 21:37:38 +0000111 return 0;
112 }
113
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900114 return serial_rx_fifo_level(port) ? 1 : 0;
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900115}
116
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900117static int serial_getc_check(struct uart_port *port)
Nobuhiro Iwamatsu6564b1a2008-06-06 16:16:08 +0900118{
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900119 unsigned short status;
120
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900121 status = sci_in(port, SCxSR);
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900122
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +0900123 if (status & SCIF_ERRORS)
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900124 handle_error(port);
125 if (sci_in(port, SCLSR) & SCxSR_ORER(port))
126 handle_error(port);
127 return status & (SCIF_DR | SCxSR_RDxF(port));
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900128}
129
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900130static int sh_serial_getc_generic(struct uart_port *port)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900131{
Nobuhiro Iwamatsu6564b1a2008-06-06 16:16:08 +0900132 unsigned short status;
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900133 char ch;
Nobuhiro Iwamatsufcabccc2008-08-22 17:48:51 +0900134
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900135 if (!serial_getc_check(port))
136 return -EAGAIN;
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900137
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900138 ch = sci_in(port, SCxRDR);
139 status = sci_in(port, SCxSR);
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900140
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900141 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900142
Nobuhiro Iwamatsua5579ca2010-10-26 03:55:15 +0900143 if (status & SCIF_ERRORS)
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900144 handle_error(port);
145
146 if (sci_in(port, SCLSR) & SCxSR_ORER(port))
147 handle_error(port);
148
149 return ch;
150}
151
152#ifdef CONFIG_DM_SERIAL
153
154static int sh_serial_pending(struct udevice *dev, bool input)
155{
156 struct uart_port *priv = dev_get_priv(dev);
157
158 return sh_serial_tstc_generic(priv);
159}
160
161static int sh_serial_putc(struct udevice *dev, const char ch)
162{
163 struct uart_port *priv = dev_get_priv(dev);
164
165 return serial_raw_putc(priv, ch);
166}
167
168static int sh_serial_getc(struct udevice *dev)
169{
170 struct uart_port *priv = dev_get_priv(dev);
171
172 return sh_serial_getc_generic(priv);
173}
174
175static int sh_serial_setbrg(struct udevice *dev, int baudrate)
176{
177 struct sh_serial_platdata *plat = dev_get_platdata(dev);
178 struct uart_port *priv = dev_get_priv(dev);
179
180 sh_serial_setbrg_generic(priv, plat->clk, baudrate);
181
182 return 0;
183}
184
185static int sh_serial_probe(struct udevice *dev)
186{
187 struct sh_serial_platdata *plat = dev_get_platdata(dev);
188 struct uart_port *priv = dev_get_priv(dev);
189
190 priv->membase = (unsigned char *)plat->base;
191 priv->mapbase = plat->base;
192 priv->type = plat->type;
193 priv->clk_mode = plat->clk_mode;
194
195 sh_serial_init_generic(priv);
196
197 return 0;
198}
199
200static const struct dm_serial_ops sh_serial_ops = {
201 .putc = sh_serial_putc,
202 .pending = sh_serial_pending,
203 .getc = sh_serial_getc,
204 .setbrg = sh_serial_setbrg,
205};
206
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900207#ifdef CONFIG_OF_CONTROL
208static const struct udevice_id sh_serial_id[] ={
Yoshinori Satoe5669a32016-04-18 16:51:05 +0900209 {.compatible = "renesas,sci", .data = PORT_SCI},
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900210 {.compatible = "renesas,scif", .data = PORT_SCIF},
211 {.compatible = "renesas,scifa", .data = PORT_SCIFA},
212 {}
213};
214
215static int sh_serial_ofdata_to_platdata(struct udevice *dev)
216{
217 struct sh_serial_platdata *plat = dev_get_platdata(dev);
Marek Vasut8fe2ffc2017-07-21 23:19:18 +0200218 struct clk sh_serial_clk;
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900219 fdt_addr_t addr;
Marek Vasut8fe2ffc2017-07-21 23:19:18 +0200220 int ret;
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900221
Simon Glassdd79d6e2017-01-17 16:52:55 -0700222 addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900223 if (addr == FDT_ADDR_T_NONE)
224 return -EINVAL;
225
226 plat->base = addr;
Marek Vasut8fe2ffc2017-07-21 23:19:18 +0200227
228 ret = clk_get_by_name(dev, "fck", &sh_serial_clk);
229 if (!ret)
230 plat->clk = clk_get_rate(&sh_serial_clk);
231 else
232 plat->clk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
233 "clock", 1);
234
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900235 plat->type = dev_get_driver_data(dev);
236 return 0;
237}
238#endif
239
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900240U_BOOT_DRIVER(serial_sh) = {
241 .name = "serial_sh",
242 .id = UCLASS_SERIAL,
Yoshinori Satoa6eed2b2016-04-18 16:51:04 +0900243 .of_match = of_match_ptr(sh_serial_id),
244 .ofdata_to_platdata = of_match_ptr(sh_serial_ofdata_to_platdata),
245 .platdata_auto_alloc_size = sizeof(struct sh_serial_platdata),
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900246 .probe = sh_serial_probe,
247 .ops = &sh_serial_ops,
248 .flags = DM_FLAG_PRE_RELOC,
249 .priv_auto_alloc_size = sizeof(struct uart_port),
250};
251
252#else /* CONFIG_DM_SERIAL */
253
254#if defined(CONFIG_CONS_SCIF0)
255# define SCIF_BASE SCIF0_BASE
256#elif defined(CONFIG_CONS_SCIF1)
257# define SCIF_BASE SCIF1_BASE
258#elif defined(CONFIG_CONS_SCIF2)
259# define SCIF_BASE SCIF2_BASE
260#elif defined(CONFIG_CONS_SCIF3)
261# define SCIF_BASE SCIF3_BASE
262#elif defined(CONFIG_CONS_SCIF4)
263# define SCIF_BASE SCIF4_BASE
264#elif defined(CONFIG_CONS_SCIF5)
265# define SCIF_BASE SCIF5_BASE
266#elif defined(CONFIG_CONS_SCIF6)
267# define SCIF_BASE SCIF6_BASE
268#elif defined(CONFIG_CONS_SCIF7)
269# define SCIF_BASE SCIF7_BASE
270#else
271# error "Default SCIF doesn't set....."
272#endif
273
274#if defined(CONFIG_SCIF_A)
275 #define SCIF_BASE_PORT PORT_SCIFA
Yoshinori Satoe5669a32016-04-18 16:51:05 +0900276#elif defined(CONFIG_SCI)
277 #define SCIF_BASE_PORT PORT_SCI
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900278#else
279 #define SCIF_BASE_PORT PORT_SCIF
280#endif
281
282static struct uart_port sh_sci = {
283 .membase = (unsigned char *)SCIF_BASE,
284 .mapbase = SCIF_BASE,
285 .type = SCIF_BASE_PORT,
286#ifdef CONFIG_SCIF_USE_EXT_CLK
287 .clk_mode = EXT_CLK,
288#endif
289};
290
291static void sh_serial_setbrg(void)
292{
293 DECLARE_GLOBAL_DATA_PTR;
294 struct uart_port *port = &sh_sci;
295
296 sh_serial_setbrg_generic(port, CONFIG_SH_SCIF_CLK_FREQ, gd->baudrate);
297}
298
299static int sh_serial_init(void)
300{
301 struct uart_port *port = &sh_sci;
302
303 sh_serial_init_generic(port);
304 serial_setbrg();
305
306 return 0;
307}
308
309static void sh_serial_putc(const char c)
310{
311 struct uart_port *port = &sh_sci;
312
313 if (c == '\n') {
314 while (1) {
315 if (serial_raw_putc(port, '\r') != -EAGAIN)
316 break;
317 }
318 }
319 while (1) {
320 if (serial_raw_putc(port, c) != -EAGAIN)
321 break;
322 }
323}
324
325static int sh_serial_tstc(void)
326{
327 struct uart_port *port = &sh_sci;
328
329 return sh_serial_tstc_generic(port);
330}
331
332static int sh_serial_getc(void)
333{
334 struct uart_port *port = &sh_sci;
335 int ch;
336
337 while (1) {
338 ch = sh_serial_getc_generic(port);
339 if (ch != -EAGAIN)
340 break;
341 }
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900342
Nobuhiro Iwamatsu6564b1a2008-06-06 16:16:08 +0900343 return ch;
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900344}
Marek Vasut904d3d72012-09-14 22:40:08 +0200345
Marek Vasut904d3d72012-09-14 22:40:08 +0200346static struct serial_device sh_serial_drv = {
347 .name = "sh_serial",
348 .start = sh_serial_init,
349 .stop = NULL,
350 .setbrg = sh_serial_setbrg,
351 .putc = sh_serial_putc,
Marek Vasutd9c64492012-10-06 14:07:02 +0000352 .puts = default_serial_puts,
Marek Vasut904d3d72012-09-14 22:40:08 +0200353 .getc = sh_serial_getc,
354 .tstc = sh_serial_tstc,
355};
356
357void sh_serial_initialize(void)
358{
359 serial_register(&sh_serial_drv);
360}
361
362__weak struct serial_device *default_serial_console(void)
363{
364 return &sh_serial_drv;
365}
Nobuhiro Iwamatsu6d020352015-02-12 13:48:04 +0900366#endif /* CONFIG_DM_SERIAL */