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Linus Walleij717b0a82012-08-04 05:21:28 +00001/*
2 * (C) Copyright 2012
3 * Linaro
4 * Linus Walleij <linus.walleij@linaro.org>
5 * Common ARM Integrator configuration settings
6 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
Linus Walleij717b0a82012-08-04 05:21:28 +00008 */
9
Linus Walleij717b0a82012-08-04 05:21:28 +000010#define CONFIG_SYS_MEMTEST_START 0x100000
11#define CONFIG_SYS_MEMTEST_END 0x10000000
Linus Walleij717b0a82012-08-04 05:21:28 +000012#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
13#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
Linus Walleij717b0a82012-08-04 05:21:28 +000014#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
15
16#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
17#define CONFIG_SETUP_MEMORY_TAGS
Linus Walleij717b0a82012-08-04 05:21:28 +000018#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
Linus Walleij717b0a82012-08-04 05:21:28 +000019
20/*
21 * There are various dependencies on the core module (CM) fitted
22 * Users should refer to their CM user guide
23 */
24#include "armcoremodule.h"
25
26/*
27 * Initialize and remap the core module, use SPD to detect memory size
28 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
29 * the core module has a CM_INIT register
30 * then the U-Boot initialisation code will
31 * e.g. ARM Boot Monitor or pre-loader is repeated once
32 * (to re-initialise any existing CM_INIT settings to safe values).
33 *
34 * This is usually not the desired behaviour since the platform
35 * will either reboot into the ARM monitor (or pre-loader)
36 * or continuously cycle thru it without U-Boot running,
37 * depending upon the setting of Integrator/CP switch S2-4.
38 *
39 * However it may be needed if Integrator/CP switch S2-1
40 * is set OFF to boot direct into U-Boot.
41 * In that case comment out the line below.
42 */
43#define CONFIG_CM_INIT
44#define CONFIG_CM_REMAP
45#define CONFIG_CM_SPD_DETECT
46
47/*
48 * The ARM boot monitor initializes the board.
49 * However, the default U-Boot code also performs the initialization.
50 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
51 * - see documentation supplied with board for details of how to choose the
52 * image to run at reset/power up
53 * e.g. whether the ARM Boot Monitor runs before U-Boot
54 */
55/* #define CONFIG_SKIP_LOWLEVEL_INIT */
56
57/*
58 * The ARM boot monitor does not relocate U-Boot.
59 * However, the default U-Boot code performs the relocation check,
60 * and may relocate the code if the memory map is changed.
61 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
62 */
63/* #define SKIP_CONFIG_RELOCATE_UBOOT */
64
Linus Walleij717b0a82012-08-04 05:21:28 +000065/*
66 * Physical Memory Map
67 */
68#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
69#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
70#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
71#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
72#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
73#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
74 CONFIG_SYS_INIT_RAM_SIZE - \
75 GENERATED_GBL_DATA_SIZE)
76#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
Linus Walleij48fd6152015-04-05 01:48:33 +020077
78/*
79 * FLASH and environment organization
80 * Top varies according to amount fitted
81 * Reserve top 4 blocks of flash
82 * - ARM Boot Monitor
83 * - Unused
84 * - SIB block
85 * - U-Boot environment
86 */
Linus Walleij48fd6152015-04-05 01:48:33 +020087#define CONFIG_SYS_FLASH_CFI 1
88#define CONFIG_FLASH_CFI_DRIVER 1
89#define CONFIG_SYS_FLASH_BASE 0x24000000
90#define CONFIG_SYS_MAX_FLASH_BANKS 1
91
92/* Timeout values in ticks */
93#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
94#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
95#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
96#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */