blob: 281f0b29e3bc1c006e312ee6188e9892b7ef5ab5 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This provides a bit-banged interface to the ethernet MII management
26 * channel.
27 */
28
29#include <common.h>
30#include <miiphy.h>
31
Jon Loeliger052fc842007-07-08 18:10:08 -050032#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020033#include <asm/types.h>
34#include <linux/list.h>
35#include <malloc.h>
36#include <net.h>
37
38/* local debug macro */
39#define MII_DEBUG
40#undef MII_DEBUG
41
42#undef debug
43#ifdef MII_DEBUG
44#define debug(fmt,args...) printf (fmt ,##args)
45#else
46#define debug(fmt,args...)
47#endif /* MII_DEBUG */
48
49struct mii_dev {
50 struct list_head link;
51 char *name;
Larry Johnson81b974b2007-10-31 11:21:29 -050052 int (*read) (char *devname, unsigned char addr,
53 unsigned char reg, unsigned short *value);
54 int (*write) (char *devname, unsigned char addr,
55 unsigned char reg, unsigned short value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020056};
57
58static struct list_head mii_devs;
59static struct mii_dev *current_mii;
60
61/*****************************************************************************
62 *
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010063 * Initialize global data. Need to be called before any other miiphy routine.
64 */
Larry Johnson81b974b2007-10-31 11:21:29 -050065void miiphy_init ()
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010066{
Larry Johnson81b974b2007-10-31 11:21:29 -050067 INIT_LIST_HEAD (&mii_devs);
68 current_mii = NULL;
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010069}
70
71/*****************************************************************************
72 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +020073 * Register read and write MII access routines for the device <name>.
74 */
Larry Johnson81b974b2007-10-31 11:21:29 -050075void miiphy_register (char *name,
76 int (*read) (char *devname, unsigned char addr,
77 unsigned char reg, unsigned short *value),
78 int (*write) (char *devname, unsigned char addr,
79 unsigned char reg, unsigned short value))
Marian Balakowiczaab8c492005-10-28 22:30:33 +020080{
81 struct list_head *entry;
82 struct mii_dev *new_dev;
83 struct mii_dev *miidev;
Marian Balakowiczaab8c492005-10-28 22:30:33 +020084 unsigned int name_len;
85
Marian Balakowiczaab8c492005-10-28 22:30:33 +020086 /* check if we have unique name */
Larry Johnson81b974b2007-10-31 11:21:29 -050087 list_for_each (entry, &mii_devs) {
88 miidev = list_entry (entry, struct mii_dev, link);
89 if (strcmp (miidev->name, name) == 0) {
90 printf ("miiphy_register: non unique device name "
91 "'%s'\n", name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020092 return;
93 }
94 }
95
96 /* allocate memory */
Larry Johnson81b974b2007-10-31 11:21:29 -050097 name_len = strlen (name);
98 new_dev =
99 (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200100
Larry Johnson81b974b2007-10-31 11:21:29 -0500101 if (new_dev == NULL) {
102 printf ("miiphy_register: cannot allocate memory for '%s'\n",
103 name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200104 return;
105 }
Larry Johnson81b974b2007-10-31 11:21:29 -0500106 memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200107
108 /* initalize mii_dev struct fields */
Larry Johnson81b974b2007-10-31 11:21:29 -0500109 INIT_LIST_HEAD (&new_dev->link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200110 new_dev->read = read;
111 new_dev->write = write;
112 new_dev->name = (char *)(new_dev + 1);
Larry Johnson81b974b2007-10-31 11:21:29 -0500113 strncpy (new_dev->name, name, name_len);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200114 new_dev->name[name_len] = '\0';
115
Larry Johnson81b974b2007-10-31 11:21:29 -0500116 debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
117 new_dev->name, new_dev->read, new_dev->write);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200118
119 /* add it to the list */
Larry Johnson81b974b2007-10-31 11:21:29 -0500120 list_add_tail (&new_dev->link, &mii_devs);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200121
122 if (!current_mii)
123 current_mii = new_dev;
124}
125
Larry Johnson81b974b2007-10-31 11:21:29 -0500126int miiphy_set_current_dev (char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200127{
128 struct list_head *entry;
129 struct mii_dev *dev;
130
Larry Johnson81b974b2007-10-31 11:21:29 -0500131 list_for_each (entry, &mii_devs) {
132 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200133
Larry Johnson81b974b2007-10-31 11:21:29 -0500134 if (strcmp (devname, dev->name) == 0) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200135 current_mii = dev;
136 return 0;
137 }
138 }
139
Larry Johnson81b974b2007-10-31 11:21:29 -0500140 printf ("No such device: %s\n", devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200141 return 1;
142}
143
Larry Johnson81b974b2007-10-31 11:21:29 -0500144char *miiphy_get_current_dev ()
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200145{
146 if (current_mii)
147 return current_mii->name;
148
149 return NULL;
150}
151
152/*****************************************************************************
153 *
154 * Read to variable <value> from the PHY attached to device <devname>,
155 * use PHY address <addr> and register <reg>.
156 *
157 * Returns:
158 * 0 on success
159 */
Larry Johnson81b974b2007-10-31 11:21:29 -0500160int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
161 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200162{
163 struct list_head *entry;
164 struct mii_dev *dev;
165 int found_dev = 0;
166 int read_ret = 0;
167
168 if (!devname) {
Larry Johnson81b974b2007-10-31 11:21:29 -0500169 printf ("NULL device name!\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200170 return 1;
171 }
172
Larry Johnson81b974b2007-10-31 11:21:29 -0500173 list_for_each (entry, &mii_devs) {
174 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200175
Larry Johnson81b974b2007-10-31 11:21:29 -0500176 if (strcmp (devname, dev->name) == 0) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200177 found_dev = 1;
Larry Johnson81b974b2007-10-31 11:21:29 -0500178 read_ret = dev->read (devname, addr, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200179 break;
180 }
181 }
182
183 if (found_dev == 0)
Larry Johnson81b974b2007-10-31 11:21:29 -0500184 printf ("No such device: %s\n", devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200185
186 return ((found_dev) ? read_ret : 1);
187}
188
189/*****************************************************************************
190 *
191 * Write <value> to the PHY attached to device <devname>,
192 * use PHY address <addr> and register <reg>.
193 *
194 * Returns:
195 * 0 on success
196 */
Larry Johnson81b974b2007-10-31 11:21:29 -0500197int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
198 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200199{
200 struct list_head *entry;
201 struct mii_dev *dev;
202 int found_dev = 0;
203 int write_ret = 0;
204
205 if (!devname) {
Larry Johnson81b974b2007-10-31 11:21:29 -0500206 printf ("NULL device name!\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200207 return 1;
208 }
209
Larry Johnson81b974b2007-10-31 11:21:29 -0500210 list_for_each (entry, &mii_devs) {
211 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200212
Larry Johnson81b974b2007-10-31 11:21:29 -0500213 if (strcmp (devname, dev->name) == 0) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200214 found_dev = 1;
Larry Johnson81b974b2007-10-31 11:21:29 -0500215 write_ret = dev->write (devname, addr, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200216 break;
217 }
218 }
219
220 if (found_dev == 0)
Larry Johnson81b974b2007-10-31 11:21:29 -0500221 printf ("No such device: %s\n", devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200222
223 return ((found_dev) ? write_ret : 1);
224}
225
226/*****************************************************************************
227 *
228 * Print out list of registered MII capable devices.
229 */
Larry Johnson81b974b2007-10-31 11:21:29 -0500230void miiphy_listdev (void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200231{
232 struct list_head *entry;
233 struct mii_dev *dev;
234
Larry Johnson81b974b2007-10-31 11:21:29 -0500235 puts ("MII devices: ");
236 list_for_each (entry, &mii_devs) {
237 dev = list_entry (entry, struct mii_dev, link);
238 printf ("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200239 }
Larry Johnson81b974b2007-10-31 11:21:29 -0500240 puts ("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200241
242 if (current_mii)
Larry Johnson81b974b2007-10-31 11:21:29 -0500243 printf ("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200244}
245
wdenkc6097192002-11-03 00:24:07 +0000246/*****************************************************************************
247 *
248 * Read the OUI, manufacture's model number, and revision number.
249 *
250 * OUI: 22 bits (unsigned int)
251 * Model: 6 bits (unsigned char)
252 * Revision: 4 bits (unsigned char)
253 *
254 * Returns:
255 * 0 on success
256 */
Larry Johnson81b974b2007-10-31 11:21:29 -0500257int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000258 unsigned char *model, unsigned char *rev)
259{
260 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000261 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000262
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200263 if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
wdenkc6097192002-11-03 00:24:07 +0000264#ifdef DEBUG
wdenk42c05472004-03-23 22:14:11 +0000265 puts ("PHY ID register 2 read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000266#endif
267 return (-1);
268 }
wdenkf4cec3f2003-12-06 23:20:41 +0000269 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000270
271#ifdef DEBUG
272 printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
273#endif
274 if (reg == 0xFFFF) {
275 /* No physical device present at this address */
276 return (-1);
277 }
278
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200279 if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
wdenkc6097192002-11-03 00:24:07 +0000280#ifdef DEBUG
wdenk42c05472004-03-23 22:14:11 +0000281 puts ("PHY ID register 1 read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000282#endif
283 return (-1);
284 }
wdenkf4cec3f2003-12-06 23:20:41 +0000285 reg |= tmp << 16;
wdenkc6097192002-11-03 00:24:07 +0000286#ifdef DEBUG
287 printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
288#endif
Larry Johnson81b974b2007-10-31 11:21:29 -0500289 *oui = (reg >> 10);
290 *model = (unsigned char)((reg >> 4) & 0x0000003F);
291 *rev = (unsigned char)(reg & 0x0000000F);
wdenkc6097192002-11-03 00:24:07 +0000292 return (0);
293}
294
wdenkc6097192002-11-03 00:24:07 +0000295/*****************************************************************************
296 *
297 * Reset the PHY.
298 * Returns:
299 * 0 on success
300 */
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200301int miiphy_reset (char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000302{
303 unsigned short reg;
304 int loop_cnt;
305
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200306 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200307#ifdef DEBUG
308 printf ("PHY status read failed\n");
309#endif
310 return (-1);
311 }
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200312 if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) {
wdenkc6097192002-11-03 00:24:07 +0000313#ifdef DEBUG
wdenk42c05472004-03-23 22:14:11 +0000314 puts ("PHY reset failed\n");
wdenkc6097192002-11-03 00:24:07 +0000315#endif
316 return (-1);
317 }
wdenk2cefd152004-02-08 22:55:38 +0000318#ifdef CONFIG_PHY_RESET_DELAY
319 udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
320#endif
wdenkc6097192002-11-03 00:24:07 +0000321 /*
322 * Poll the control register for the reset bit to go to 0 (it is
323 * auto-clearing). This should happen within 0.5 seconds per the
324 * IEEE spec.
325 */
326 loop_cnt = 0;
327 reg = 0x8000;
328 while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200329 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
wdenkc6097192002-11-03 00:24:07 +0000330# ifdef DEBUG
wdenk42c05472004-03-23 22:14:11 +0000331 puts ("PHY status read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000332# endif
333 return (-1);
334 }
335 }
336 if ((reg & 0x8000) == 0) {
337 return (0);
338 } else {
wdenk42c05472004-03-23 22:14:11 +0000339 puts ("PHY reset timed out\n");
wdenkc6097192002-11-03 00:24:07 +0000340 return (-1);
341 }
342 return (0);
343}
344
wdenkc6097192002-11-03 00:24:07 +0000345/*****************************************************************************
346 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500347 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000348 */
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200349int miiphy_speed (char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000350{
Larry Johnson966a80b2007-11-01 08:46:50 -0500351 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000352
wdenkeec9a3d2004-03-23 23:20:24 +0000353#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500354 u16 btsr;
355
356 /*
357 * Check for 1000BASE-X. If it is supported, then assume that the speed
358 * is 1000.
359 */
360 if (miiphy_is_1000base_x (devname, addr)) {
361 return _1000BASET;
362 }
363 /*
364 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
365 */
366 /* Check for 1000BASE-T. */
367 if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
368 printf ("PHY 1000BT status");
369 goto miiphy_read_failed;
370 }
371 if (btsr != 0xFFFF &&
372 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) {
373 return _1000BASET;
wdenked2ac4b2004-03-14 18:23:55 +0000374 }
wdenkeec9a3d2004-03-23 23:20:24 +0000375#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000376
wdenke3a06802004-06-06 23:13:55 +0000377 /* Check Basic Management Control Register first. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500378 if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
379 printf ("PHY speed");
380 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000381 }
wdenke3a06802004-06-06 23:13:55 +0000382 /* Check if auto-negotiation is on. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500383 if (bmcr & PHY_BMCR_AUTON) {
wdenke3a06802004-06-06 23:13:55 +0000384 /* Get auto-negotiation results. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500385 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
386 printf ("PHY AN speed");
387 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000388 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500389 return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000390 }
391 /* Get speed from basic control settings. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500392 return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000393
Larry Johnson966a80b2007-11-01 08:46:50 -0500394 miiphy_read_failed:
395 printf (" read failed, assuming 10BASE-T\n");
396 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000397}
398
wdenkc6097192002-11-03 00:24:07 +0000399/*****************************************************************************
400 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500401 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000402 */
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200403int miiphy_duplex (char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000404{
Larry Johnson966a80b2007-11-01 08:46:50 -0500405 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000406
wdenkeec9a3d2004-03-23 23:20:24 +0000407#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500408 u16 btsr;
409
410 /* Check for 1000BASE-X. */
411 if (miiphy_is_1000base_x (devname, addr)) {
412 /* 1000BASE-X */
413 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
414 printf ("1000BASE-X PHY AN duplex");
415 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000416 }
417 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500418 /*
419 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
420 */
421 /* Check for 1000BASE-T. */
422 if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
423 printf ("PHY 1000BT status");
424 goto miiphy_read_failed;
425 }
426 if (btsr != 0xFFFF) {
427 if (btsr & PHY_1000BTSR_1000FD) {
428 return FULL;
429 } else if (btsr & PHY_1000BTSR_1000HD) {
430 return HALF;
431 }
432 }
wdenkeec9a3d2004-03-23 23:20:24 +0000433#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000434
wdenke3a06802004-06-06 23:13:55 +0000435 /* Check Basic Management Control Register first. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500436 if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
437 puts ("PHY duplex");
438 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000439 }
wdenke3a06802004-06-06 23:13:55 +0000440 /* Check if auto-negotiation is on. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500441 if (bmcr & PHY_BMCR_AUTON) {
wdenke3a06802004-06-06 23:13:55 +0000442 /* Get auto-negotiation results. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500443 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
444 puts ("PHY AN duplex");
445 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000446 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500447 return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ?
448 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000449 }
450 /* Get speed from basic control settings. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500451 return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
452
453 miiphy_read_failed:
454 printf (" read failed, assuming half duplex\n");
455 return HALF;
456}
wdenke3a06802004-06-06 23:13:55 +0000457
Larry Johnson966a80b2007-11-01 08:46:50 -0500458/*****************************************************************************
459 *
460 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
461 * 1000BASE-T, or on error.
462 */
463int miiphy_is_1000base_x (char *devname, unsigned char addr)
464{
465#if defined(CONFIG_PHY_GIGE)
466 u16 exsr;
467
468 if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) {
469 printf ("PHY extended status read failed, assuming no "
470 "1000BASE-X\n");
471 return 0;
472 }
473 return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH));
474#else
475 return 0;
476#endif
wdenkc6097192002-11-03 00:24:07 +0000477}
478
wdenk49c3f672003-10-08 22:33:00 +0000479#ifdef CFG_FAULT_ECHO_LINK_DOWN
480/*****************************************************************************
481 *
482 * Determine link status
483 */
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200484int miiphy_link (char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000485{
486 unsigned short reg;
487
wdenk145d2c12004-04-15 21:48:45 +0000488 /* dummy read; needed to latch some phys */
Larry Johnson81b974b2007-10-31 11:21:29 -0500489 (void)miiphy_read (devname, addr, PHY_BMSR, &reg);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200490 if (miiphy_read (devname, addr, PHY_BMSR, &reg)) {
wdenk42c05472004-03-23 22:14:11 +0000491 puts ("PHY_BMSR read failed, assuming no link\n");
wdenk49c3f672003-10-08 22:33:00 +0000492 return (0);
493 }
494
495 /* Determine if a link is active */
496 if ((reg & PHY_BMSR_LS) != 0) {
497 return (1);
498 } else {
499 return (0);
500 }
501}
502#endif
Jon Loeliger052fc842007-07-08 18:10:08 -0500503#endif /* CONFIG_MII */