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git01.mediatek.com / filogic / uboot / 41d2293592fb18d48822c8f3dd35d40a8c1d15de / . / arch / powerpc / cpu / mpc83xx / bats / bats.h
blob: 2629cd5eab80e0effc2e9ec5a6939f90f051e540 [file] [log] [blame]
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]1#ifdef CONFIG_BAT0
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]2#define CFG_SYS_IBAT0L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]3 (CONFIG_BAT0_BASE) |\
4 (CONFIG_BAT0_PAGE_PROTECTION) |\
5 (CONFIG_BAT0_WIMG_ICACHE) \
6 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]7#define CFG_SYS_IBAT0U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]8 (CONFIG_BAT0_BASE) |\
9 (CONFIG_BAT0_LENGTH) |\
10 (CONFIG_BAT0_VALID_BITS) \
11 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]12#define CFG_SYS_DBAT0L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]13 (CONFIG_BAT0_BASE) |\
14 (CONFIG_BAT0_PAGE_PROTECTION) |\
15 (CONFIG_BAT0_WIMG_DCACHE) \
16 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]17#define CFG_SYS_DBAT0U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]18 (CONFIG_BAT0_BASE) |\
19 (CONFIG_BAT0_LENGTH) |\
20 (CONFIG_BAT0_VALID_BITS) \
21 )
22#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]23#define CFG_SYS_IBAT0L (0)
24#define CFG_SYS_IBAT0U (0)
25#define CFG_SYS_DBAT0L (0)
26#define CFG_SYS_DBAT0U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]27#endif /* CONFIG_BAT0 */
28
29#ifdef CONFIG_BAT1
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]30#define CFG_SYS_IBAT1L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]31 (CONFIG_BAT1_BASE) |\
32 (CONFIG_BAT1_PAGE_PROTECTION) |\
33 (CONFIG_BAT1_WIMG_ICACHE) \
34 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]35#define CFG_SYS_IBAT1U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]36 (CONFIG_BAT1_BASE) |\
37 (CONFIG_BAT1_LENGTH) |\
38 (CONFIG_BAT1_VALID_BITS) \
39 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]40#define CFG_SYS_DBAT1L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]41 (CONFIG_BAT1_BASE) |\
42 (CONFIG_BAT1_PAGE_PROTECTION) |\
43 (CONFIG_BAT1_WIMG_DCACHE) \
44 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]45#define CFG_SYS_DBAT1U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]46 (CONFIG_BAT1_BASE) |\
47 (CONFIG_BAT1_LENGTH) |\
48 (CONFIG_BAT1_VALID_BITS) \
49 )
50#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]51#define CFG_SYS_IBAT1L (0)
52#define CFG_SYS_IBAT1U (0)
53#define CFG_SYS_DBAT1L (0)
54#define CFG_SYS_DBAT1U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]55#endif /* CONFIG_BAT1 */
56
57#ifdef CONFIG_BAT2
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]58#define CFG_SYS_IBAT2L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]59 (CONFIG_BAT2_BASE) |\
60 (CONFIG_BAT2_PAGE_PROTECTION) |\
61 (CONFIG_BAT2_WIMG_ICACHE) \
62 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]63#define CFG_SYS_IBAT2U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]64 (CONFIG_BAT2_BASE) |\
65 (CONFIG_BAT2_LENGTH) |\
66 (CONFIG_BAT2_VALID_BITS) \
67 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]68#define CFG_SYS_DBAT2L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]69 (CONFIG_BAT2_BASE) |\
70 (CONFIG_BAT2_PAGE_PROTECTION) |\
71 (CONFIG_BAT2_WIMG_DCACHE) \
72 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]73#define CFG_SYS_DBAT2U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]74 (CONFIG_BAT2_BASE) |\
75 (CONFIG_BAT2_LENGTH) |\
76 (CONFIG_BAT2_VALID_BITS) \
77 )
78#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]79#define CFG_SYS_IBAT2L (0)
80#define CFG_SYS_IBAT2U (0)
81#define CFG_SYS_DBAT2L (0)
82#define CFG_SYS_DBAT2U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]83#endif /* CONFIG_BAT2 */
84
85#ifdef CONFIG_BAT3
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]86#define CFG_SYS_IBAT3L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]87 (CONFIG_BAT3_BASE) |\
88 (CONFIG_BAT3_PAGE_PROTECTION) |\
89 (CONFIG_BAT3_WIMG_ICACHE) \
90 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]91#define CFG_SYS_IBAT3U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]92 (CONFIG_BAT3_BASE) |\
93 (CONFIG_BAT3_LENGTH) |\
94 (CONFIG_BAT3_VALID_BITS) \
95 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]96#define CFG_SYS_DBAT3L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]97 (CONFIG_BAT3_BASE) |\
98 (CONFIG_BAT3_PAGE_PROTECTION) |\
99 (CONFIG_BAT3_WIMG_DCACHE) \
100 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]101#define CFG_SYS_DBAT3U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]102 (CONFIG_BAT3_BASE) |\
103 (CONFIG_BAT3_LENGTH) |\
104 (CONFIG_BAT3_VALID_BITS) \
105 )
106#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]107#define CFG_SYS_IBAT3L (0)
108#define CFG_SYS_IBAT3U (0)
109#define CFG_SYS_DBAT3L (0)
110#define CFG_SYS_DBAT3U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]111#endif /* CONFIG_BAT3 */
112
113#ifdef CONFIG_BAT4
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]114#define CFG_SYS_IBAT4L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]115 (CONFIG_BAT4_BASE) |\
116 (CONFIG_BAT4_PAGE_PROTECTION) |\
117 (CONFIG_BAT4_WIMG_ICACHE) \
118 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]119#define CFG_SYS_IBAT4U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]120 (CONFIG_BAT4_BASE) |\
121 (CONFIG_BAT4_LENGTH) |\
122 (CONFIG_BAT4_VALID_BITS) \
123 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]124#define CFG_SYS_DBAT4L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]125 (CONFIG_BAT4_BASE) |\
126 (CONFIG_BAT4_PAGE_PROTECTION) |\
127 (CONFIG_BAT4_WIMG_DCACHE) \
128 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]129#define CFG_SYS_DBAT4U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]130 (CONFIG_BAT4_BASE) |\
131 (CONFIG_BAT4_LENGTH) |\
132 (CONFIG_BAT4_VALID_BITS) \
133 )
134#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]135#define CFG_SYS_IBAT4L (0)
136#define CFG_SYS_IBAT4U (0)
137#define CFG_SYS_DBAT4L (0)
138#define CFG_SYS_DBAT4U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]139#endif /* CONFIG_BAT4 */
140
141#ifdef CONFIG_BAT5
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]142#define CFG_SYS_IBAT5L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]143 (CONFIG_BAT5_BASE) |\
144 (CONFIG_BAT5_PAGE_PROTECTION) |\
145 (CONFIG_BAT5_WIMG_ICACHE) \
146 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]147#define CFG_SYS_IBAT5U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]148 (CONFIG_BAT5_BASE) |\
149 (CONFIG_BAT5_LENGTH) |\
150 (CONFIG_BAT5_VALID_BITS) \
151 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]152#define CFG_SYS_DBAT5L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]153 (CONFIG_BAT5_BASE) |\
154 (CONFIG_BAT5_PAGE_PROTECTION) |\
155 (CONFIG_BAT5_WIMG_DCACHE) \
156 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]157#define CFG_SYS_DBAT5U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]158 (CONFIG_BAT5_BASE) |\
159 (CONFIG_BAT5_LENGTH) |\
160 (CONFIG_BAT5_VALID_BITS) \
161 )
162#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]163#define CFG_SYS_IBAT5L (0)
164#define CFG_SYS_IBAT5U (0)
165#define CFG_SYS_DBAT5L (0)
166#define CFG_SYS_DBAT5U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]167#endif /* CONFIG_BAT5 */
168
169#ifdef CONFIG_BAT6
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]170#define CFG_SYS_IBAT6L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]171 (CONFIG_BAT6_BASE) |\
172 (CONFIG_BAT6_PAGE_PROTECTION) |\
173 (CONFIG_BAT6_WIMG_ICACHE) \
174 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]175#define CFG_SYS_IBAT6U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]176 (CONFIG_BAT6_BASE) |\
177 (CONFIG_BAT6_LENGTH) |\
178 (CONFIG_BAT6_VALID_BITS) \
179 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]180#define CFG_SYS_DBAT6L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]181 (CONFIG_BAT6_BASE) |\
182 (CONFIG_BAT6_PAGE_PROTECTION) |\
183 (CONFIG_BAT6_WIMG_DCACHE) \
184 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]185#define CFG_SYS_DBAT6U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]186 (CONFIG_BAT6_BASE) |\
187 (CONFIG_BAT6_LENGTH) |\
188 (CONFIG_BAT6_VALID_BITS) \
189 )
190#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]191#define CFG_SYS_IBAT6L (0)
192#define CFG_SYS_IBAT6U (0)
193#define CFG_SYS_DBAT6L (0)
194#define CFG_SYS_DBAT6U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]195#endif /* CONFIG_BAT6 */
196
197#ifdef CONFIG_BAT7
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]198#define CFG_SYS_IBAT7L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]199 (CONFIG_BAT7_BASE) |\
200 (CONFIG_BAT7_PAGE_PROTECTION) |\
201 (CONFIG_BAT7_WIMG_ICACHE) \
202 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]203#define CFG_SYS_IBAT7U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]204 (CONFIG_BAT7_BASE) |\
205 (CONFIG_BAT7_LENGTH) |\
206 (CONFIG_BAT7_VALID_BITS) \
207 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]208#define CFG_SYS_DBAT7L (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]209 (CONFIG_BAT7_BASE) |\
210 (CONFIG_BAT7_PAGE_PROTECTION) |\
211 (CONFIG_BAT7_WIMG_DCACHE) \
212 )
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]213#define CFG_SYS_DBAT7U (\
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]214 (CONFIG_BAT7_BASE) |\
215 (CONFIG_BAT7_LENGTH) |\
216 (CONFIG_BAT7_VALID_BITS) \
217 )
218#else
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]219#define CFG_SYS_IBAT7L (0)
220#define CFG_SYS_IBAT7U (0)
221#define CFG_SYS_DBAT7L (0)
222#define CFG_SYS_DBAT7U (0)
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]223#endif /* CONFIG_BAT7 */