blob: ea1d4b8e4972619223f4909d07db3b9a2b3c9c00 [file] [log] [blame]
Boris BREZILLON7832bf32015-03-04 13:13:05 +01001/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2015 ECA Sinters
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#include <asm/arch/clock.h>
12#include <asm/arch/imx-regs.h>
13#include <asm/arch/iomux.h>
14#include <asm/arch/mx6-pins.h>
15#include <asm/errno.h>
16#include <asm/gpio.h>
17#include <asm/imx-common/iomux-v3.h>
18#include <asm/imx-common/boot_mode.h>
19#include <malloc.h>
20#include <mmc.h>
21#include <fsl_esdhc.h>
22#include <miiphy.h>
23#include <netdev.h>
24#include <asm/arch/mxc_hdmi.h>
25#include <asm/arch/crm_regs.h>
26#include <linux/fb.h>
27#include <ipu_pixfmt.h>
28#include <asm/io.h>
29#include <asm/arch/sys_proto.h>
30#include <micrel.h>
31#include <asm/imx-common/mxc_i2c.h>
32#include <i2c.h>
33
34#include "../common/mx6.h"
35
36DECLARE_GLOBAL_DATA_PTR;
37
38int dram_init(void)
39{
40 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
41
42 return 0;
43}
44
45int board_early_init_f(void)
46{
47 seco_mx6_setup_uart_iomux();
48
49 return 0;
50}
51
52int board_phy_config(struct phy_device *phydev)
53{
54 seco_mx6_rgmii_rework(phydev);
55 if (phydev->drv->config)
56 phydev->drv->config(phydev);
57
58 return 0;
59}
60
61int board_eth_init(bd_t *bis)
62{
63 uint32_t base = IMX_FEC_BASE;
64 struct mii_dev *bus = NULL;
65 struct phy_device *phydev = NULL;
66 int ret = 0;
67
68 seco_mx6_setup_enet_iomux();
69
70#ifdef CONFIG_FEC_MXC
71 bus = fec_get_miibus(base, -1);
72 if (!bus)
73 return -ENOMEM;
74
75 /* scan phy 4,5,6,7 */
76 phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
77 if (!phydev) {
78 free(bus);
79 return -ENOMEM;
80 }
81
82 printf("using phy at %d\n", phydev->addr);
83 ret = fec_probe(bis, -1, base, bus, phydev);
84 if (ret) {
85 free(phydev);
86 free(bus);
87 printf("FEC MXC: %s:failed\n", __func__);
88 }
89#endif
90
91 return ret;
92}
93
94static struct fsl_esdhc_cfg usdhc_cfg[2] = {
95 {USDHC3_BASE_ADDR},
96 {USDHC2_BASE_ADDR},
97};
98
99int board_mmc_init(bd_t *bis)
100{
101 u32 index = 0;
102 int ret;
103
104 /*
105 * Following map is done:
106 * (U-boot device node) (Physical Port)
107 * mmc0 eMMC on Board
108 * mmc1 Ext SD
109 */
110 for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
111 switch (index) {
112 case 0:
113 seco_mx6_setup_usdhc_iomux(3);
114 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
115 usdhc_cfg[0].max_bus_width = 4;
116 break;
117 case 1:
118 seco_mx6_setup_usdhc_iomux(4);
119 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
120 usdhc_cfg[1].max_bus_width = 4;
121 break;
122
123 default:
124 printf("Warning: %d exceed maximum number of SD ports %d\n",
125 index + 1, CONFIG_SYS_FSL_USDHC_NUM);
126 return -EINVAL;
127 }
128
129 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
130 if (ret)
131 return ret;
132 }
133
134 return 0;
135}
136
137int board_init(void)
138{
139 /* address of boot parameters */
140 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
141
142 imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 |
143 MUX_PAD_CTRL(NO_PAD_CTRL));
144
145 gpio_direction_output(IMX_GPIO_NR(2, 4), 0);
146
147 /* Set Low */
148 gpio_set_value(IMX_GPIO_NR(2, 4), 0);
149 udelay(1000);
150
151 /* Set High */
152 gpio_set_value(IMX_GPIO_NR(2, 4), 1);
153
154 return 0;
155}
156
157int checkboard(void)
158{
159 puts("Board: SECO uQ7\n");
160
161 return 0;
162}