blob: 47e692936503da50304343302d902dc16baf7636 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rick Chen36cb27c2017-12-26 13:55:53 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chen36cb27c2017-12-26 13:55:53 +08005 */
6
Rick Chen36cb27c2017-12-26 13:55:53 +08007#include <common.h>
8#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
9#include <netdev.h>
10#endif
11#include <linux/io.h>
Rick Chencea16d02018-05-29 11:07:53 +080012#include <faraday/ftsmc020.h>
13#include <fdtdec.h>
Rick Chen9e017162019-08-28 18:46:07 +080014#include <dm.h>
Rick Chenc3027d02019-11-14 13:52:22 +080015#include <spl.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080016
17DECLARE_GLOBAL_DATA_PTR;
18
Rick Chen2a218152018-12-03 17:48:20 +080019extern phys_addr_t prior_stage_fdt_address;
Rick Chen36cb27c2017-12-26 13:55:53 +080020/*
21 * Miscellaneous platform dependent initializations
22 */
23
24int board_init(void)
25{
Rick Chen36cb27c2017-12-26 13:55:53 +080026 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
27
28 return 0;
29}
30
31int dram_init(void)
32{
Rick Chen92038262019-11-14 13:52:23 +080033 return fdtdec_setup_mem_size_base();
Rick Chen36cb27c2017-12-26 13:55:53 +080034}
35
36int dram_init_banksize(void)
37{
Rick Chen92038262019-11-14 13:52:23 +080038 return fdtdec_setup_memory_banksize();
Rick Chen36cb27c2017-12-26 13:55:53 +080039}
40
41#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
42int board_eth_init(bd_t *bd)
43{
44 return ftmac100_initialize(bd);
45}
46#endif
47
48ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
49{
50 return 0;
51}
Rick Chen40a6fe72018-03-29 10:08:33 +080052
53void *board_fdt_blob_setup(void)
54{
Rick Chen40a6fe72018-03-29 10:08:33 +080055 return (void *)CONFIG_SYS_FDT_BASE;
56}
Rick Chencea16d02018-05-29 11:07:53 +080057
58int smc_init(void)
59{
60 int node = -1;
61 const char *compat = "andestech,atfsmc020";
62 void *blob = (void *)gd->fdt_blob;
63 fdt_addr_t addr;
64 struct ftsmc020_bank *regs;
65
66 node = fdt_node_offset_by_compatible(blob, -1, compat);
67 if (node < 0)
68 return -FDT_ERR_NOTFOUND;
69
70 addr = fdtdec_get_addr(blob, node, "reg");
71
72 if (addr == FDT_ADDR_T_NONE)
73 return -EINVAL;
74
75 regs = (struct ftsmc020_bank *)addr;
76 regs->cr &= ~FTSMC020_BANK_WPROT;
77
78 return 0;
79}
80
Rick Chen9e017162019-08-28 18:46:07 +080081static void v5l2_init(void)
82{
83 struct udevice *dev;
84
85 uclass_get_device(UCLASS_CACHE, 0, &dev);
86}
87
Rick Chencea16d02018-05-29 11:07:53 +080088#ifdef CONFIG_BOARD_EARLY_INIT_F
89int board_early_init_f(void)
90{
91 smc_init();
Rick Chen9e017162019-08-28 18:46:07 +080092 v5l2_init();
Rick Chencea16d02018-05-29 11:07:53 +080093
94 return 0;
95}
96#endif
Rick Chenc3027d02019-11-14 13:52:22 +080097
98#ifdef CONFIG_SPL
99void board_boot_order(u32 *spl_boot_list)
100{
101 u8 i;
102 u32 boot_devices[] = {
103#ifdef CONFIG_SPL_RAM_SUPPORT
104 BOOT_DEVICE_RAM,
105#endif
106#ifdef CONFIG_SPL_MMC_SUPPORT
107 BOOT_DEVICE_MMC1,
108#endif
109 };
110
111 for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
112 spl_boot_list[i] = boot_devices[i];
113}
114#endif
115
116#ifdef CONFIG_SPL_LOAD_FIT
117int board_fit_config_name_match(const char *name)
118{
119 /* boot using first FIT config */
120 return 0;
121}
122#endif