blob: 3d6ba3f383c535e82b947366416b116dec02f718 [file] [log] [blame]
developered71a402018-11-15 10:07:53 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 MediaTek Inc.
4 */
5
Tom Rinid2161552024-04-30 07:35:46 -06006#include <config.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -07007#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06008#include <asm/global_data.h>
developered71a402018-11-15 10:07:53 +08009#include <linux/io.h>
10#include <linux/sizes.h>
11#include <asm/arch/misc.h>
12
13#include "preloader.h"
14
15DECLARE_GLOBAL_DATA_PTR;
16
17struct boot_argument *preloader_param;
18
19int mtk_soc_early_init(void)
20{
21 return 0;
22}
23
24int dram_init(void)
25{
26 u32 i;
27
Tom Rinibb4dd962022-11-16 13:10:37 -050028 if (((size_t)preloader_param >= CFG_SYS_SDRAM_BASE) &&
developered71a402018-11-15 10:07:53 +080029 ((size_t)preloader_param % sizeof(size_t) == 0) &&
30 preloader_param->magic == BOOT_ARGUMENT_MAGIC &&
31 preloader_param->dram_rank_num <=
32 ARRAY_SIZE(preloader_param->dram_rank_size)) {
33 gd->ram_size = 0;
34
35 for (i = 0; i < preloader_param->dram_rank_num; i++)
36 gd->ram_size += preloader_param->dram_rank_size[i];
37 } else {
Tom Rinibb4dd962022-11-16 13:10:37 -050038 gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
developered71a402018-11-15 10:07:53 +080039 SZ_2G);
40 }
41
42 return 0;
43}
44
45int print_cpuinfo(void)
46{
47 void __iomem *chipid;
48 u32 swver;
49
50 chipid = ioremap(VER_BASE, VER_SIZE);
51 swver = readl(chipid + APSW_VER);
52
53 printf("CPU: MediaTek MT7623 E%d\n", (swver & 0xf) + 1);
54
55 return 0;
56}