| Jon Medhurst \(Tixy\) | 413ca3d | 2016-06-23 13:37:32 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2016 Linaro |
| 3 | * Jon Medhurst <tixy@linaro.org> |
| 4 | * |
| 5 | * TC2 specific code for Versatile Express. |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #include <asm/io.h> |
| 11 | |
| 12 | #define SCC_BASE 0x7fff0000 |
| 13 | |
| 14 | bool armv7_boot_nonsec_default(void) |
| 15 | { |
| 16 | #ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT |
| 17 | return false |
| 18 | #else |
| 19 | /* |
| 20 | * The Serial Configuration Controller (SCC) register at address 0x700 |
| 21 | * contains flags for configuring the behaviour of the Boot Monitor |
| 22 | * (which CPUs execute from reset). Two of these bits are of interest: |
| 23 | * |
| 24 | * bit 12 = Use per-cpu mailboxes for power management |
| 25 | * bit 13 = Power down the non-boot cluster |
| 26 | * |
| 27 | * It is only when both of these are false that U-Boot's current |
| 28 | * implementation of 'nonsec' mode can work as expected because we |
| 29 | * rely on getting all CPUs to execute _nonsec_init, so let's check that. |
| 30 | */ |
| 31 | return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0; |
| 32 | #endif |
| 33 | } |