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git01.mediatek.com / filogic / uboot / 413c7b300d534f242ae6562f4728f028520f203e / . / dts / upstream / src / powerpc / yosemite.dts
blob: 56508785ce1386efe6720988b78581ce900e892a [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1/*
2 * Device Tree Source for AMCC Yosemite
3 *
4 * Copyright 2008 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
12/dts-v1/;
13
14/ {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "amcc,yosemite";
18 compatible = "amcc,yosemite";
19 dcr-parent = <&{/cpus/cpu@0}>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 serial2 = &UART2;
27 serial3 = &UART3;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 cpu@0 {
35 device_type = "cpu";
36 model = "PowerPC,440EP";
37 reg = <0x00000000>;
38 clock-frequency = <0>; /* Filled in by zImage */
39 timebase-frequency = <0>; /* Filled in by zImage */
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>;
43 d-cache-size = <32768>;
44 dcr-controller;
45 dcr-access-method = "native";
46 };
47 };
48
49 memory {
50 device_type = "memory";
51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
52 };
53
54 UIC0: interrupt-controller0 {
55 compatible = "ibm,uic-440ep","ibm,uic";
56 interrupt-controller;
57 cell-index = <0>;
58 dcr-reg = <0x0c0 0x009>;
59 #address-cells = <0>;
60 #size-cells = <0>;
61 #interrupt-cells = <2>;
62 };
63
64 UIC1: interrupt-controller1 {
65 compatible = "ibm,uic-440ep","ibm,uic";
66 interrupt-controller;
67 cell-index = <1>;
68 dcr-reg = <0x0d0 0x009>;
69 #address-cells = <0>;
70 #size-cells = <0>;
71 #interrupt-cells = <2>;
72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
73 interrupt-parent = <&UIC0>;
74 };
75
76 SDR0: sdr {
77 compatible = "ibm,sdr-440ep";
78 dcr-reg = <0x00e 0x002>;
79 };
80
81 CPR0: cpr {
82 compatible = "ibm,cpr-440ep";
83 dcr-reg = <0x00c 0x002>;
84 };
85
86 plb {
87 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
88 #address-cells = <2>;
89 #size-cells = <1>;
90 ranges;
91 clock-frequency = <0>; /* Filled in by zImage */
92
93 SDRAM0: sdram {
94 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
95 dcr-reg = <0x010 0x002>;
96 };
97
98 DMA0: dma {
99 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
100 dcr-reg = <0x100 0x027>;
101 };
102
103 MAL0: mcmal {
104 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
105 dcr-reg = <0x180 0x062>;
106 num-tx-chans = <4>;
107 num-rx-chans = <2>;
108 interrupt-parent = <&MAL0>;
109 interrupts = <0x0 0x1 0x2 0x3 0x4>;
110 #interrupt-cells = <1>;
111 #address-cells = <0>;
112 #size-cells = <0>;
113 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
114 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
115 /*SERR*/ 0x2 &UIC1 0x0 0x4
116 /*TXDE*/ 0x3 &UIC1 0x1 0x4
117 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
118 };
119
120 POB0: opb {
121 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
122 #address-cells = <1>;
123 #size-cells = <1>;
124 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
125 * bits.
126 */
127 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
128 0x80000000 0x00000000 0x80000000 0x80000000>;
129 interrupt-parent = <&UIC1>;
130 interrupts = <0x7 0x4>;
131 clock-frequency = <0>; /* Filled in by zImage */
132
133 EBC0: ebc {
134 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
135 dcr-reg = <0x012 0x002>;
136 #address-cells = <2>;
137 #size-cells = <1>;
138 clock-frequency = <0>; /* Filled in by zImage */
139 interrupts = <0x5 0x1>;
140 interrupt-parent = <&UIC1>;
141
142 nor_flash@0,0 {
143 compatible = "amd,s29gl256n", "cfi-flash";
144 bank-width = <2>;
145 reg = <0x00000000 0x00000000 0x04000000>;
146 #address-cells = <1>;
147 #size-cells = <1>;
148 partition@0 {
149 label = "kernel";
150 reg = <0x00000000 0x001e0000>;
151 };
152 partition@1e0000 {
153 label = "dtb";
154 reg = <0x001e0000 0x00020000>;
155 };
156 partition@200000 {
157 label = "ramdisk";
158 reg = <0x00200000 0x01400000>;
159 };
160 partition@1600000 {
161 label = "jffs2";
162 reg = <0x01600000 0x00400000>;
163 };
164 partition@1a00000 {
165 label = "user";
166 reg = <0x01a00000 0x02540000>;
167 };
168 partition@3f40000 {
169 label = "env";
170 reg = <0x03f40000 0x00040000>;
171 };
172 partition@3f80000 {
173 label = "u-boot";
174 reg = <0x03f80000 0x00080000>;
175 };
176 };
177 };
178
179 UART0: serial@ef600300 {
180 device_type = "serial";
181 compatible = "ns16550";
182 reg = <0xef600300 0x00000008>;
183 virtual-reg = <0xef600300>;
184 clock-frequency = <0>; /* Filled in by zImage */
185 current-speed = <115200>;
186 interrupt-parent = <&UIC0>;
187 interrupts = <0x0 0x4>;
188 };
189
190 UART1: serial@ef600400 {
191 device_type = "serial";
192 compatible = "ns16550";
193 reg = <0xef600400 0x00000008>;
194 virtual-reg = <0xef600400>;
195 clock-frequency = <0>;
196 current-speed = <0>;
197 interrupt-parent = <&UIC0>;
198 interrupts = <0x1 0x4>;
199 };
200
201 UART2: serial@ef600500 {
202 device_type = "serial";
203 compatible = "ns16550";
204 reg = <0xef600500 0x00000008>;
205 virtual-reg = <0xef600500>;
206 clock-frequency = <0>;
207 current-speed = <0>;
208 interrupt-parent = <&UIC0>;
209 interrupts = <0x3 0x4>;
210 status = "disabled";
211 };
212
213 UART3: serial@ef600600 {
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <0xef600600 0x00000008>;
217 virtual-reg = <0xef600600>;
218 clock-frequency = <0>;
219 current-speed = <0>;
220 interrupt-parent = <&UIC0>;
221 interrupts = <0x4 0x4>;
222 status = "disabled";
223 };
224
225 IIC0: i2c@ef600700 {
226 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
227 reg = <0xef600700 0x00000014>;
228 interrupt-parent = <&UIC0>;
229 interrupts = <0x2 0x4>;
230 };
231
232 IIC1: i2c@ef600800 {
233 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
234 reg = <0xef600800 0x00000014>;
235 interrupt-parent = <&UIC0>;
236 interrupts = <0x7 0x4>;
237 };
238
239 spi@ef600900 {
240 compatible = "amcc,spi-440ep";
241 reg = <0xef600900 0x00000006>;
242 interrupts = <0x8 0x4>;
243 interrupt-parent = <&UIC0>;
244 };
245
246 ZMII0: emac-zmii@ef600d00 {
247 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
248 reg = <0xef600d00 0x0000000c>;
249 };
250
251 EMAC0: ethernet@ef600e00 {
252 device_type = "network";
253 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
254 interrupt-parent = <&UIC1>;
255 interrupts = <0x1c 0x4 0x1d 0x4>;
256 reg = <0xef600e00 0x00000070>;
257 local-mac-address = [000000000000];
258 mal-device = <&MAL0>;
259 mal-tx-channel = <0 1>;
260 mal-rx-channel = <0>;
261 cell-index = <0>;
262 max-frame-size = <1500>;
263 rx-fifo-size = <4096>;
264 tx-fifo-size = <2048>;
265 phy-mode = "rmii";
266 phy-map = <0x00000000>;
267 zmii-device = <&ZMII0>;
268 zmii-channel = <0>;
269 };
270
271 EMAC1: ethernet@ef600f00 {
272 device_type = "network";
273 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
274 interrupt-parent = <&UIC1>;
275 interrupts = <0x1e 0x4 0x1f 0x4>;
276 reg = <0xef600f00 0x00000070>;
277 local-mac-address = [000000000000];
278 mal-device = <&MAL0>;
279 mal-tx-channel = <2 3>;
280 mal-rx-channel = <1>;
281 cell-index = <1>;
282 max-frame-size = <1500>;
283 rx-fifo-size = <4096>;
284 tx-fifo-size = <2048>;
285 phy-mode = "rmii";
286 phy-map = <0x00000000>;
287 zmii-device = <&ZMII0>;
288 zmii-channel = <1>;
289 };
290
291 usb@ef601000 {
292 compatible = "ohci-be";
293 reg = <0xef601000 0x00000080>;
294 interrupts = <0x8 0x4 0x9 0x4>;
295 interrupt-parent = < &UIC1 >;
296 };
297 };
298
299 PCI0: pci@ec000000 {
300 device_type = "pci";
301 #interrupt-cells = <1>;
302 #size-cells = <2>;
303 #address-cells = <3>;
304 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
305 primary;
306 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
307 0x00000000 0xeed00000 0x00000004 /* IACK */
308 0x00000000 0xeed00000 0x00000004 /* Special cycle */
309 0x00000000 0xef400000 0x00000040>; /* Internal registers */
310
311 /* Outbound ranges, one memory and one IO,
312 * later cannot be changed. Chip supports a second
313 * IO range but we don't use it for now
314 */
315 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
316 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
317
318 /* Inbound 2GB range starting at 0 */
319 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
320
321 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
322 interrupt-map = <
323 /* IDSEL 12 */
324 0x6000 0x0 0x0 0x0 &UIC0 0x19 0x8
325 >;
326 };
327 };
328
329 chosen {
330 stdout-path = "/plb/opb/serial@ef600300";
331 };
332};