| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: MediaTek DISP_PWM Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Jitao Shi <jitao.shi@mediatek.com> |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 11 | |
| 12 | allOf: |
| 13 | - $ref: pwm.yaml# |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | oneOf: |
| 18 | - enum: |
| 19 | - mediatek,mt2701-disp-pwm |
| 20 | - mediatek,mt6595-disp-pwm |
| 21 | - mediatek,mt8173-disp-pwm |
| 22 | - mediatek,mt8183-disp-pwm |
| 23 | - items: |
| 24 | - enum: |
| 25 | - mediatek,mt6795-disp-pwm |
| 26 | - mediatek,mt8167-disp-pwm |
| 27 | - const: mediatek,mt8173-disp-pwm |
| 28 | - items: |
| 29 | - enum: |
| 30 | - mediatek,mt8186-disp-pwm |
| 31 | - mediatek,mt8188-disp-pwm |
| 32 | - mediatek,mt8192-disp-pwm |
| 33 | - mediatek,mt8195-disp-pwm |
| 34 | - const: mediatek,mt8183-disp-pwm |
| 35 | |
| 36 | reg: |
| 37 | maxItems: 1 |
| 38 | |
| 39 | "#pwm-cells": |
| 40 | const: 2 |
| 41 | |
| 42 | interrupts: |
| 43 | maxItems: 1 |
| 44 | |
| 45 | clocks: |
| 46 | items: |
| 47 | - description: Main Clock |
| 48 | - description: Mm Clock |
| 49 | |
| 50 | clock-names: |
| 51 | items: |
| 52 | - const: main |
| 53 | - const: mm |
| 54 | |
| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 55 | power-domains: |
| 56 | maxItems: 1 |
| 57 | |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 58 | required: |
| 59 | - compatible |
| 60 | - reg |
| 61 | - "#pwm-cells" |
| 62 | - clocks |
| 63 | - clock-names |
| 64 | |
| 65 | additionalProperties: false |
| 66 | |
| 67 | examples: |
| 68 | - | |
| 69 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 70 | #include <dt-bindings/clock/mt8173-clk.h> |
| 71 | #include <dt-bindings/interrupt-controller/irq.h> |
| 72 | |
| 73 | pwm0: pwm@1401e000 { |
| 74 | compatible = "mediatek,mt8173-disp-pwm"; |
| 75 | reg = <0x1401e000 0x1000>; |
| 76 | #pwm-cells = <2>; |
| 77 | clocks = <&mmsys CLK_MM_DISP_PWM026M>, |
| 78 | <&mmsys CLK_MM_DISP_PWM0MM>; |
| 79 | clock-names = "main", "mm"; |
| 80 | }; |