| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * Marvell SoC pinctrl core driver for mpp |
| 2 | |
| 3 | The pinctrl driver enables Marvell SoCs to configure the multi-purpose pins |
| 4 | (mpp) to a specific function. For each SoC family there is a SoC specific |
| 5 | driver using this core driver. |
| 6 | |
| 7 | Please refer to pinctrl-bindings.txt in this directory for details of the |
| 8 | common pinctrl bindings used by client devices, including the meaning of the |
| 9 | phrase "pin configuration node". |
| 10 | |
| 11 | A Marvell SoC pin configuration node is a node of a group of pins which can |
| 12 | be used for a specific device or function. Each node requires one or more |
| 13 | mpp pins or group of pins and a mpp function common to all pins. |
| 14 | |
| 15 | Required properties for pinctrl driver: |
| 16 | - compatible: "marvell,<soc>-pinctrl" |
| 17 | Please refer to each marvell,<soc>-pinctrl.txt binding doc for supported SoCs. |
| 18 | |
| 19 | Required properties for pin configuration node: |
| 20 | - marvell,pins: string array of mpp pins or group of pins to be muxed. |
| 21 | - marvell,function: string representing a function to mux to for all |
| 22 | marvell,pins given in this pin configuration node. The function has to be |
| 23 | common for all marvell,pins. Please refer to marvell,<soc>-pinctrl.txt for |
| 24 | valid pin/pin group names and available function names for each SoC. |
| 25 | |
| 26 | Examples: |
| 27 | |
| 28 | uart1: serial@12100 { |
| 29 | compatible = "ns16550a"; |
| 30 | reg = <0x12100 0x100>; |
| 31 | reg-shift = <2>; |
| 32 | interrupts = <7>; |
| 33 | |
| 34 | pinctrl-0 = <&pmx_uart1_sw>; |
| 35 | pinctrl-names = "default"; |
| 36 | }; |
| 37 | |
| 38 | pinctrl: pinctrl@d0200 { |
| 39 | compatible = "marvell,dove-pinctrl"; |
| 40 | reg = <0xd0200 0x14>, <0xd0440 0x04>, <0xd802c 0x08>; |
| 41 | |
| 42 | pmx_uart1_sw: pmx-uart1-sw { |
| 43 | marvell,pins = "mpp_uart1"; |
| 44 | marvell,function = "uart1"; |
| 45 | }; |
| 46 | }; |