| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * IPQ806x DWMAC Ethernet controller |
| 2 | |
| 3 | The device inherits all the properties of the dwmac/stmmac devices |
| 4 | described in the file net/stmmac.txt with the following changes. |
| 5 | |
| 6 | Required properties: |
| 7 | |
| 8 | - compatible: should be "qcom,ipq806x-gmac" along with "snps,dwmac" |
| 9 | and any applicable more detailed version number |
| 10 | described in net/stmmac.txt |
| 11 | |
| 12 | - qcom,nss-common: should contain a phandle to a syscon device mapping the |
| 13 | nss-common registers. |
| 14 | |
| 15 | - qcom,qsgmii-csr: should contain a phandle to a syscon device mapping the |
| 16 | qsgmii-csr registers. |
| 17 | |
| 18 | Example: |
| 19 | |
| 20 | gmac: ethernet@37000000 { |
| 21 | device_type = "network"; |
| 22 | compatible = "qcom,ipq806x-gmac"; |
| 23 | reg = <0x37000000 0x200000>; |
| 24 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; |
| 25 | interrupt-names = "macirq"; |
| 26 | |
| 27 | qcom,nss-common = <&nss_common>; |
| 28 | qcom,qsgmii-csr = <&qsgmii_csr>; |
| 29 | |
| 30 | clocks = <&gcc GMAC_CORE1_CLK>; |
| 31 | clock-names = "stmmaceth"; |
| 32 | |
| 33 | resets = <&gcc GMAC_CORE1_RESET>; |
| 34 | reset-names = "stmmaceth"; |
| 35 | }; |