blob: af96b4fd89d5cbf6eb4d91639f4b4cfa466721bb [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
8
9maintainers:
10 - Florian Fainelli <f.fainelli@gmail.com>
11
12description:
13 This MDIO bus multiplexer defines buses that could be internal as well as
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
15 C-45 Clause. When child bus is selected, one needs to select these two
16 properties as well to generate desired MDIO transaction on appropriate bus.
17
18allOf:
19 - $ref: /schemas/net/mdio-mux.yaml#
20
21properties:
22 compatible:
23 const: brcm,mdio-mux-iproc
24
25 reg:
26 maxItems: 1
27
28 clocks:
29 maxItems: 1
30 description: core clock driving the MDIO block
31
32
33required:
34 - compatible
35 - reg
36
37unevaluatedProperties: false
38
39examples:
40 - |
41 mdio_mux_iproc: mdio-mux@66020000 {
42 compatible = "brcm,mdio-mux-iproc";
43 reg = <0x66020000 0x250>;
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 mdio@0 {
48 reg = <0x0>;
49 #address-cells = <1>;
50 #size-cells = <0>;
51
52 pci_phy0: pci-phy@0 {
53 compatible = "brcm,ns2-pcie-phy";
54 reg = <0x0>;
55 #phy-cells = <0>;
56 };
57 };
58
59 mdio@7 {
60 reg = <0x7>;
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 pci_phy1: pci-phy@0 {
65 compatible = "brcm,ns2-pcie-phy";
66 reg = <0x0>;
67 #phy-cells = <0>;
68 };
69 };
70
71 mdio@10 {
72 reg = <0x10>;
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 gphy0: eth-phy@10 {
77 reg = <0x10>;
78 };
79 };
80 };