Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | FLCTL NAND controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : "renesas,shmobile-flctl-sh7372" |
| 5 | - reg : Address range of the FLCTL |
| 6 | - interrupts : flste IRQ number |
| 7 | - nand-bus-width : bus width to NAND chip |
| 8 | |
| 9 | Optional properties: |
| 10 | - dmas: DMA specifier(s) |
| 11 | - dma-names: name for each DMA specifier. Valid names are |
| 12 | "data_tx", "data_rx", "ecc_tx", "ecc_rx" |
| 13 | |
| 14 | The DMA fields are not used yet in the driver but are listed here for |
| 15 | completing the bindings. |
| 16 | |
| 17 | The device tree may optionally contain sub-nodes describing partitions of the |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 18 | address space. See mtd.yaml for more detail. |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 19 | |
| 20 | Example: |
| 21 | |
| 22 | flctl@e6a30000 { |
| 23 | #address-cells = <1>; |
| 24 | #size-cells = <1>; |
| 25 | compatible = "renesas,shmobile-flctl-sh7372"; |
| 26 | reg = <0xe6a30000 0x100>; |
| 27 | interrupts = <0x0d80>; |
| 28 | |
| 29 | nand-bus-width = <16>; |
| 30 | |
| 31 | dmas = <&dmac 1 /* data_tx */ |
| 32 | &dmac 2;> /* data_rx */ |
| 33 | dma-names = "data_tx", "data_rx"; |
| 34 | |
| 35 | system@0 { |
| 36 | label = "system"; |
| 37 | reg = <0x0 0x8000000>; |
| 38 | }; |
| 39 | |
| 40 | userdata@8000000 { |
| 41 | label = "userdata"; |
| 42 | reg = <0x8000000 0x10000000>; |
| 43 | }; |
| 44 | |
| 45 | cache@18000000 { |
| 46 | label = "cache"; |
| 47 | reg = <0x18000000 0x8000000>; |
| 48 | }; |
| 49 | }; |