| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Synopsys Designware Mobile Storage Host Controller Common Properties |
| 8 | |
| 9 | allOf: |
| 10 | - $ref: mmc-controller.yaml# |
| 11 | |
| 12 | maintainers: |
| 13 | - Ulf Hansson <ulf.hansson@linaro.org> |
| 14 | |
| 15 | # Everything else is described in the common file |
| 16 | properties: |
| 17 | resets: |
| 18 | maxItems: 1 |
| 19 | |
| 20 | reset-names: |
| 21 | const: reset |
| 22 | |
| 23 | clock-frequency: |
| 24 | description: |
| 25 | Should be the frequency (in Hz) of the ciu clock. If this |
| 26 | is specified and the ciu clock is specified then we'll try to set the ciu |
| 27 | clock to this at probe time. |
| 28 | |
| 29 | fifo-depth: |
| 30 | description: |
| 31 | The maximum size of the tx/rx fifo's. If this property is not |
| 32 | specified, the default value of the fifo size is determined from the |
| 33 | controller registers. |
| 34 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 35 | |
| 36 | card-detect-delay: |
| 37 | description: |
| 38 | Delay in milli-seconds before detecting card after card |
| 39 | insert event. The default value is 0. |
| 40 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 41 | default: 0 |
| 42 | |
| 43 | data-addr: |
| 44 | description: |
| 45 | Override fifo address with value provided by DT. The default FIFO reg |
| 46 | offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A) |
| 47 | by driver. If the controller does not follow this rule, please use |
| 48 | this property to set fifo address in device tree. |
| 49 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 50 | |
| 51 | fifo-watermark-aligned: |
| 52 | description: |
| 53 | Data done irq is expected if data length is less than |
| 54 | watermark in PIO mode. But fifo watermark is requested to be aligned |
| 55 | with data length in some SoC so that TX/RX irq can be generated with |
| 56 | data done irq. Add this watermark quirk to mark this requirement and |
| 57 | force fifo watermark setting accordingly. |
| 58 | $ref: /schemas/types.yaml#/definitions/flag |
| 59 | |
| 60 | dmas: |
| 61 | maxItems: 1 |
| 62 | |
| 63 | dma-names: |
| 64 | const: rx-tx |
| 65 | |
| 66 | additionalProperties: true |