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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Hantro G1 VPU codecs implemented on Rockchip SoCs
9
10maintainers:
11 - Ezequiel Garcia <ezequiel@collabora.com>
12
13description:
14 Hantro G1 video encode and decode accelerators present on Rockchip SoCs.
15
16properties:
17 compatible:
18 oneOf:
19 - enum:
20 - rockchip,rk3036-vpu
21 - rockchip,rk3066-vpu
22 - rockchip,rk3288-vpu
23 - rockchip,rk3328-vpu
24 - rockchip,rk3399-vpu
25 - rockchip,px30-vpu
26 - rockchip,rk3568-vpu
27 - rockchip,rk3588-av1-vpu
28 - items:
29 - const: rockchip,rk3188-vpu
30 - const: rockchip,rk3066-vpu
31 - items:
32 - const: rockchip,rk3228-vpu
33 - const: rockchip,rk3399-vpu
34
35 reg:
36 maxItems: 1
37
38 interrupts:
39 minItems: 1
40 maxItems: 2
41
42 interrupt-names:
43 oneOf:
44 - const: vdpu
45 - items:
46 - const: vepu
47 - const: vdpu
48
49 clocks:
50 oneOf:
51 - maxItems: 2
52 - maxItems: 4
53
54 clock-names:
55 oneOf:
56 - items:
57 - const: aclk
58 - const: hclk
59 - items:
60 - const: aclk_vdpu
61 - const: hclk_vdpu
62 - const: aclk_vepu
63 - const: hclk_vepu
64
65 power-domains:
66 maxItems: 1
67
68 iommus:
69 maxItems: 1
70
71 resets:
72 items:
73 - description: AXI reset line
74 - description: AXI bus interface unit reset line
75 - description: APB reset line
76 - description: APB bus interface unit reset line
77
78required:
79 - compatible
80 - reg
81 - interrupts
82 - interrupt-names
83 - clocks
84 - clock-names
85
86additionalProperties: false
87
88examples:
89 - |
90 #include <dt-bindings/clock/rk3288-cru.h>
91 #include <dt-bindings/interrupt-controller/arm-gic.h>
92 #include <dt-bindings/power/rk3288-power.h>
93
94 vpu: video-codec@ff9a0000 {
95 compatible = "rockchip,rk3288-vpu";
96 reg = <0xff9a0000 0x800>;
97 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
98 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
99 interrupt-names = "vepu", "vdpu";
100 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
101 clock-names = "aclk", "hclk";
102 power-domains = <&power RK3288_PD_VIDEO>;
103 iommus = <&vpu_mmu>;
104 };